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Wrong setting of AUDIOSEL caused double pitch 120MHz playback

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6282 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Linus Nielsen Feltzing 2005-04-14 05:56:36 +00:00
parent 4488ad63de
commit 81bd369288
2 changed files with 3 additions and 5 deletions
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2
firmware/drivers/uda1380.c
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@ -131,8 +131,6 @@ int uda1380_set_regs(void)
/* Initialize UDA1380 codec with default register values (uda1380_defaults) */
int uda1380_init(void)
{
PLLCR &= ~(1 << 22); /* Set AudioClk = FXTAL/2*/
if (uda1380_set_regs() == -1)
return -1;

6
firmware/system.c
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@ -483,7 +483,7 @@ void set_cpu_frequency(long frequency)
DCR = (DCR & ~0x000001ff) | 1; /* Refresh timer for bypass
frequency */
PLLCR &= ~1; /* Bypass mode */
PLLCR = 0x11c53005;
PLLCR = 0x11853005;
CSCR0 = 0x00000980; /* Flash: 2 wait state */
CSCR1 = 0x00002580; /* LCD: 9 wait states */
while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
@ -502,7 +502,7 @@ void set_cpu_frequency(long frequency)
DCR = (DCR & ~0x000001ff) | 1; /* Refresh timer for bypass
frequency */
PLLCR &= ~1; /* Bypass mode */
PLLCR = 0x10c86001;
PLLCR = 0x10886001;
CSCR0 = 0x00000180; /* Flash: 0 wait states */
CSCR1 = 0x00000980; /* LCD: 2 wait states */
while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
@ -519,7 +519,7 @@ void set_cpu_frequency(long frequency)
default:
DCR = (DCR & ~0x000001ff) | 1; /* Refresh timer for bypass
frequency */
PLLCR = 0x00400000; /* Bypass mode */
PLLCR = 0x00000000; /* Bypass mode */
CSCR0 = 0x00000180; /* Flash: 0 wait states */
CSCR1 = 0x00000180; /* LCD: 0 wait states */
cpu_frequency = CPU_FREQ;