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Removed the Gmini 120 and Gmini SP code. These ports are dead, unfortunately.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11504 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jens Arnold 2006-11-10 20:26:01 +00:00
parent 270cb0b681
commit 780f79e7a4
36 changed files with 46 additions and 1533 deletions
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43
apps/debug_menu.c
View file

@ -370,26 +370,6 @@ bool dbg_audio_thread(void)
#endif /* HAVE_LCD_BITMAP */ #endif /* HAVE_LCD_BITMAP */
#if CONFIG_CPU == TCC730
static unsigned flash_word_temp IDATA_ATTR;
static void flash_write_word(unsigned addr, unsigned value) ICODE_ATTR;
static void flash_write_word(unsigned addr, unsigned value) {
flash_word_temp = value;
long extAddr = (long)addr << 1;
ddma_transfer(1, 1, &flash_word_temp, extAddr, 2);
}
static unsigned flash_read_word(unsigned addr) ICODE_ATTR;
static unsigned flash_read_word(unsigned addr) {
long extAddr = (long)addr << 1;
ddma_transfer(1, 1, &flash_word_temp, extAddr, 2);
return flash_word_temp;
}
#endif
#ifndef SIMULATOR #ifndef SIMULATOR
/* Tool function to read the flash manufacturer and type, if available. /* Tool function to read the flash manufacturer and type, if available.
Only chips which could be reprogrammed in system will return values. Only chips which could be reprogrammed in system will return values.
@ -423,37 +403,30 @@ bool dbg_flash_id(unsigned* p_manufacturer, unsigned* p_device,
#else #else
unsigned not_manu, not_id; /* read values before switching to ID mode */ unsigned not_manu, not_id; /* read values before switching to ID mode */
unsigned manu, id; /* read values when in ID mode */ unsigned manu, id; /* read values when in ID mode */
#if CONFIG_CPU == TCC730
#define FLASH(addr) (flash_read_word(addr))
#define SET_FLASH(addr, val) (flash_write_word((addr), (val)))
#else /* memory mapped */
#if CONFIG_CPU == SH7034 #if CONFIG_CPU == SH7034
volatile unsigned char* flash = (unsigned char*)0x2000000; /* flash mapping */ volatile unsigned char* flash = (unsigned char*)0x2000000; /* flash mapping */
#elif defined(CPU_COLDFIRE) #elif defined(CPU_COLDFIRE)
volatile unsigned short* flash = (unsigned short*)0; /* flash mapping */ volatile unsigned short* flash = (unsigned short*)0; /* flash mapping */
#endif
#define FLASH(addr) (flash[addr])
#define SET_FLASH(addr, val) (flash[addr] = val)
#endif #endif
int old_level; /* saved interrupt level */ int old_level; /* saved interrupt level */
not_manu = FLASH(0); /* read the normal content */ not_manu = flash[0]; /* read the normal content */
not_id = FLASH(1); /* should be 'A' (0x41) and 'R' (0x52) from the "ARCH" marker */ not_id = flash[1]; /* should be 'A' (0x41) and 'R' (0x52) from the "ARCH" marker */
/* disable interrupts, prevent any stray flash access */ /* disable interrupts, prevent any stray flash access */
old_level = set_irq_level(HIGHEST_IRQ_LEVEL); old_level = set_irq_level(HIGHEST_IRQ_LEVEL);
SET_FLASH(addr1, 0xAA); /* enter command mode */ flash[addr1] = 0xAA; /* enter command mode */
SET_FLASH(addr2, 0x55); flash[addr2] = 0x55;
SET_FLASH(addr1, 0x90); /* ID command */ flash[addr1] = 0x90; /* ID command */
/* Atmel wants 20ms pause here */ /* Atmel wants 20ms pause here */
/* sleep(HZ/50); no sleeping possible while interrupts are disabled */ /* sleep(HZ/50); no sleeping possible while interrupts are disabled */
manu = FLASH(0); /* read the IDs */ manu = flash[0]; /* read the IDs */
id = FLASH(1); id = flash[1];
SET_FLASH(0, 0xF0); /* reset flash (back to normal read mode) */ flash[0] = 0xF0; /* reset flash (back to normal read mode) */
/* Atmel wants 20ms pause here */ /* Atmel wants 20ms pause here */
/* sleep(HZ/50); no sleeping possible while interrupts are disabled */ /* sleep(HZ/50); no sleeping possible while interrupts are disabled */

18
apps/gui/gwps.h
View file

@ -161,24 +161,6 @@
#define WPS_EXIT (BUTTON_OFF | BUTTON_REPEAT) #define WPS_EXIT (BUTTON_OFF | BUTTON_REPEAT)
#define WPS_CONTEXT (BUTTON_MENU | BUTTON_REPEAT) #define WPS_CONTEXT (BUTTON_MENU | BUTTON_REPEAT)
#elif CONFIG_KEYPAD == GMINI100_PAD
#define WPS_NEXT (BUTTON_RIGHT | BUTTON_REL)
#define WPS_NEXT_PRE BUTTON_RIGHT
#define WPS_PREV (BUTTON_LEFT | BUTTON_REL)
#define WPS_PREV_PRE BUTTON_LEFT
#define WPS_FFWD (BUTTON_RIGHT | BUTTON_REPEAT)
#define WPS_REW (BUTTON_LEFT | BUTTON_REPEAT)
#define WPS_INCVOL BUTTON_UP
#define WPS_DECVOL BUTTON_DOWN
#define WPS_PAUSE BUTTON_PLAY
#define WPS_MENU (BUTTON_MENU | BUTTON_REL)
#define WPS_MENU_PRE BUTTON_MENU
#define WPS_BROWSE (BUTTON_ON | BUTTON_REL)
#define WPS_BROWSE_PRE BUTTON_ON
#define WPS_EXIT BUTTON_OFF
#define WPS_KEYLOCK (BUTTON_MENU | BUTTON_DOWN)
#define WPS_ID3 (BUTTON_MENU | BUTTON_ON)
#elif (CONFIG_KEYPAD == IPOD_3G_PAD) || (CONFIG_KEYPAD == IPOD_4G_PAD) #elif (CONFIG_KEYPAD == IPOD_3G_PAD) || (CONFIG_KEYPAD == IPOD_4G_PAD)
/* TODO: Check WPS button assignments */ /* TODO: Check WPS button assignments */

7
apps/menu.h
View file

@ -61,13 +61,6 @@
#define MENU_EXIT_MENU BUTTON_MENU #define MENU_EXIT_MENU BUTTON_MENU
#define MENU_ENTER BUTTON_RIGHT #define MENU_ENTER BUTTON_RIGHT
#elif CONFIG_KEYPAD == GMINI100_PAD
#define MENU_EXIT BUTTON_LEFT
#define MENU_EXIT2 BUTTON_OFF
#define MENU_EXIT_MENU BUTTON_MENU
#define MENU_ENTER BUTTON_RIGHT
#define MENU_ENTER2 BUTTON_PLAY
#elif (CONFIG_KEYPAD == IPOD_3G_PAD) || (CONFIG_KEYPAD == IPOD_4G_PAD) #elif (CONFIG_KEYPAD == IPOD_3G_PAD) || (CONFIG_KEYPAD == IPOD_4G_PAD)
/* TODO: Check menu button assignments */ /* TODO: Check menu button assignments */

8
apps/plugins/zxbox/keymaps.h
View file

@ -53,14 +53,6 @@
#define ZX_UP BUTTON_UP #define ZX_UP BUTTON_UP
#define ZX_DOWN BUTTON_DOWN #define ZX_DOWN BUTTON_DOWN
#elif CONFIG_KEYPAD == GMINI100_PAD
#define ZX_SELECT BUTTON_PLAY
#define ZX_MENU BUTTON_OFF
#define ZX_LEFT BUTTON_LEFT
#define ZX_RIGHT BUTTON_RIGHT
#define ZX_UP BUTTON_UP
#define ZX_DOWN BUTTON_DOWN
#elif CONFIG_KEYPAD == IRIVER_IFP7XX_PAD #elif CONFIG_KEYPAD == IRIVER_IFP7XX_PAD
#define ZX_SELECT BUTTON_SELECT #define ZX_SELECT BUTTON_SELECT
#define ZX_MENU BUTTON_PLAY #define ZX_MENU BUTTON_PLAY

8
apps/plugins/zxbox/zxbox_keyb.c
View file

@ -40,14 +40,6 @@
#define KBD_UP BUTTON_UP #define KBD_UP BUTTON_UP
#define KBD_DOWN BUTTON_DOWN #define KBD_DOWN BUTTON_DOWN
#elif CONFIG_KEYPAD == GMINI100_PAD
#define KBD_SELECT BUTTON_PLAY
#define KBD_ABORT BUTTON_OFF
#define KBD_LEFT BUTTON_LEFT
#define KBD_RIGHT BUTTON_RIGHT
#define KBD_UP BUTTON_UP
#define KBD_DOWN BUTTON_DOWN
#elif (CONFIG_KEYPAD == IPOD_3G_PAD) || (CONFIG_KEYPAD == IPOD_4G_PAD) #elif (CONFIG_KEYPAD == IPOD_3G_PAD) || (CONFIG_KEYPAD == IPOD_4G_PAD)
#define KBD_SELECT BUTTON_SELECT #define KBD_SELECT BUTTON_SELECT

95
firmware/app.lds
View file

@ -4,9 +4,6 @@ ENTRY(start)
#ifdef CPU_COLDFIRE #ifdef CPU_COLDFIRE
OUTPUT_FORMAT(elf32-m68k) OUTPUT_FORMAT(elf32-m68k)
INPUT(target/coldfire/crt0.o) INPUT(target/coldfire/crt0.o)
#elif CONFIG_CPU == TCC730
OUTPUT_FORMAT(elf32-calmrisc16)
INPUT(crt0.o)
#elif defined(CPU_ARM) #elif defined(CPU_ARM)
OUTPUT_FORMAT(elf32-littlearm) OUTPUT_FORMAT(elf32-littlearm)
OUTPUT_ARCH(arm) OUTPUT_ARCH(arm)
@ -20,100 +17,9 @@ OUTPUT_FORMAT(elf32-sh)
INPUT(target/sh/crt0.o) INPUT(target/sh/crt0.o)
#endif #endif
#if CONFIG_CPU == TCC730
MEMORY
{
FIRMWARE : ORIGIN = LOADADDRESS, LENGTH = 256K
FLASH (RX) : ORIGIN = 0x000000, LENGTH = 1024K
ICMEM (RX) : ORIGIN = 0x3FC000, LENGTH = 32K
IMEM1 : ORIGIN = 0x200000, LENGTH = 32K
IMEM2 : ORIGIN = 0x210000, LENGTH = 16K
IMEM3 : ORIGIN = 0x220000, LENGTH = 32K
IMEM4 : ORIGIN = 0x230000, LENGTH = 16K
DRAM : ORIGIN = 0x000000, LENGTH = 0x3F0000
}
SECTIONS
{
.text LOADADDRESS : {
*(.init.text)
*(.text)
}> FLASH AT> FIRMWARE
.icode 0x3FC040: {
*(.vectors)
*(.icode)
}> ICMEM AT> FIRMWARE
/* We start at 0x2000, to avoid overwriting Archos' loader datasegment.
* If it turns out that we won't call back the loader, this can be set to 0.
*/
.bss 0x2000 : {
*(.bss)
. = ALIGN(2);
}> DRAM
/* Data is put after BSS, to have all strings addresses > VIRT_PTR + VIRT_SIZE.
Strings are in rodata, so what we really assert is (.rodata > VIRT_PTR + VIRT_SIZE)
See settings.h for details */
.data ALIGN(2): {
*(.data)
. = ALIGN(2);
*(.rodata)
. = ALIGN(2);
*(.rodata.str1.2)
. = ALIGN(2);
}> DRAM AT> FIRMWARE
.stack ALIGN(2) : {
. = . + 0x2000;
}> DRAM
.idata 0x200000: {
*(.idata)
}> IMEM1
.idata2 0x220000: {
*(.idata2)
}> IMEM3
_codesize = SIZEOF(.text);
_icodecopy = LOADADDR(.icode);
_icodestart = ADDR(.icode);
_icodesize = SIZEOF(.icode);
_datacopy = LOADADDR(.data);
_datastart = ADDR(.data);
_datasize = SIZEOF(.data);
_bssstart = ADDR(.bss);
_bsssize = (SIZEOF(.bss) + 1) & ~ 1;
_stackbegin = ADDR(.stack);
_stackend = ADDR(.stack) + SIZEOF(.stack);
_idatastart = ADDR(.idata);
/* FIXME: Where to put audio buffer? */
_audiobuffer = 0;
_audiobufend = 0;
/* Plugins are not supported on the Gmini*/
_pluginbuf = 0;
}
#else
#define PLUGINSIZE PLUGIN_BUFFER_SIZE #define PLUGINSIZE PLUGIN_BUFFER_SIZE
#define CODECSIZE CODEC_SIZE #define CODECSIZE CODEC_SIZE
#ifdef DEBUG #ifdef DEBUG
#define STUBOFFSET 0x10000 #define STUBOFFSET 0x10000
#else #else
@ -332,4 +238,3 @@ SECTIONS
} }
} }
#endif

6
firmware/backlight.c
View file

@ -73,8 +73,6 @@ static inline void __backlight_on(void)
or_b(0x40, &PAIORH); or_b(0x40, &PAIORH);
#elif CONFIG_BACKLIGHT == BL_PA14_HI /* Ondio */ #elif CONFIG_BACKLIGHT == BL_PA14_HI /* Ondio */
or_b(0x40, &PADRH); /* drive it high */ or_b(0x40, &PADRH); /* drive it high */
#elif CONFIG_BACKLIGHT == BL_GMINI
P1 |= 0x10;
#endif #endif
} }
@ -87,8 +85,6 @@ static inline void __backlight_off(void)
and_b(~0x40, &PAIORH); /* let it float (up) */ and_b(~0x40, &PAIORH); /* let it float (up) */
#elif CONFIG_BACKLIGHT == BL_PA14_HI /* Ondio */ #elif CONFIG_BACKLIGHT == BL_PA14_HI /* Ondio */
and_b(~0x40, &PADRH); /* drive it low */ and_b(~0x40, &PADRH); /* drive it low */
#elif CONFIG_BACKLIGHT == BL_GMINI
P1 &= ~0x10;
#endif #endif
} }
#endif #endif
@ -568,8 +564,6 @@ void backlight_init(void)
#elif CONFIG_BACKLIGHT == BL_PA14_LO || CONFIG_BACKLIGHT == BL_PA14_HI #elif CONFIG_BACKLIGHT == BL_PA14_LO || CONFIG_BACKLIGHT == BL_PA14_HI
PACR1 &= ~0x3000; /* Set PA14 (backlight control) to GPIO */ PACR1 &= ~0x3000; /* Set PA14 (backlight control) to GPIO */
or_b(0x40, &PAIORH); /* ..and output */ or_b(0x40, &PAIORH); /* ..and output */
#elif CONFIG_BACKLIGHT == BL_GMINI
P1CON |= 0x10; /* P1.4 C-MOS output mode */
#endif #endif
backlight_on(); backlight_on();
#ifdef HAVE_REMOTE_LCD #ifdef HAVE_REMOTE_LCD

123
firmware/crt0.S
View file

@ -1,123 +0,0 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2002 by Linus Nielsen Feltzing
*
* All files in this archive are subject to the GNU General Public License.
* See the file COPYING in the source tree root for full license agreement.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
/* Most of the code from this file has now been moved into the target trees */
#include "config.h"
#include "cpu.h"
.section .init.text,"ax",@progbits
.global start
start:
#if CONFIG_CPU == TCC730
/* Platform: Gmini 120/SP */
;; disable all interrupts
clrsr fe
clrsr ie
clrsr te
ld a14, #0x3F0000
ld r5, 0xA5
ldb @[a14 + 6], r5 ; disable watchdog
ld a11, #(_datacopy) ; where the data section is in the flash
ld a8, #(_datastart) ; destination
;; copy data section from flash to ram.
ld a9, #_datasize
ld r6, e9
cmp eq, r6, #0
brf .data_copy_loop
cmp eq, r9, #0
brt .data_copy_end
.data_copy_loop:
ldc r2, @a11
ldw @[a8 + 0], r2
add a11, #0x2
add a8, #0x2
sub r9, #0x2
sbc r6, #0
cmp ugt, r6, #0
brt .data_copy_loop
cmp ugt, r9, #0
brt .data_copy_loop
.data_copy_end:
;; zero out bss
ld r2, #0
ld a8, #(_bssstart) ; destination
ld a9, #_bsssize
ld r6, e9
cmp eq, r6, #0
brf .bss_init_loop
cmp eq, r9, #0
brt .bss_init_end
.bss_init_loop:
ldw @[a8 + 0], r2
add a8, #0x2
sub r9, #0x2
sbc r6, #0
cmp ugt, r6, #0
brt .bss_init_loop
cmp ugt, r9, #0
brt .bss_init_loop
.bss_init_end:
;; set stack pointer
ld a15, _stackend
;; go!
jsr _main
;; soft reset
ld a10, #0
ldc r10, @a10
jmp a10
.section .vectors, "ax"
irq_handler:
push r0, r1
push r2, r3
push r4, r5
push r6, r7
push a8, a9
push a10, a11
push a12, a13
push a14
ld a13, #0x3f0000
ldb r0, @[a13 + 0x26]
add r0, r0
ld a10, #_interrupt_vector
ldw a13, @[a10 + r0]
jsr a13
pop a14
pop a13, a12
pop a11, a10
pop a9, a8
pop r7, r6
pop r5, r4
pop r3, r2
pop r1, r0
ret_irq
#endif

46
firmware/drivers/adc.c
View file

@ -109,50 +109,4 @@ void adc_init(void)
sleep(2); /* Ensure valid readings when adc_init returns */ sleep(2); /* Ensure valid readings when adc_init returns */
} }
#elif CONFIG_CPU == TCC730
/**************************************************************************
**
** Each channel will be updated HZ/CHANNEL_ORDER_SIZE times per second.
**
*************************************************************************/
static int current_channel;
static int current_channel_idx;
static unsigned short adcdata[NUM_ADC_CHANNELS];
#define CHANNEL_ORDER_SIZE 2
static int channel_order[CHANNEL_ORDER_SIZE] = {6,7};
static void adc_tick(void)
{
if (ADCON & (1 << 3)) {
/* previous conversion finished? */
adcdata[current_channel] = ADDATA >> 6;
if (++current_channel_idx >= CHANNEL_ORDER_SIZE)
current_channel_idx = 0;
current_channel = channel_order[current_channel_idx];
int adcon = (current_channel << 4) | 1;
ADCON = adcon;
}
}
unsigned short adc_read(int channel)
{
return adcdata[channel];
}
void adc_init(void)
{
current_channel_idx = 0;
current_channel = channel_order[current_channel_idx];
ADCON = (current_channel << 4) | 1;
tick_add_task(adc_tick);
sleep(2); /* Ensure valid readings when adc_init returns */
}
#endif #endif

130
firmware/drivers/ata.c
View file

@ -84,104 +84,6 @@
#define SET_REG(reg,val) reg = (val) #define SET_REG(reg,val) reg = (val)
#define SET_16BITREG(reg,val) reg = (val) #define SET_16BITREG(reg,val) reg = (val)
#elif CONFIG_CPU == TCC730
/* Plain C read & write loops */
#define PREFER_C_READING
#define PREFER_C_WRITING
#define SWAP_WORDS
#define ATA_DATA_IDX (0xD0)
#define ATA_ERROR_IDX (0xD2)
#define ATA_NSECTOR_IDX (0xD4)
#define ATA_SECTOR_IDX (0xD6)
#define ATA_LCYL_IDX (0xD8)
#define ATA_HCYL_IDX (0xDA)
#define ATA_SELECT_IDX (0xDC)
#define ATA_COMMAND_IDX (0xDE)
#define ATA_CONTROL_IDX (0xEC)
#define ATA_FEATURE_IDX ATA_ERROR_IDX
#define ATA_STATUS_IDX ATA_COMMAND_IDX
#define ATA_ALT_STATUS_IDX ATA_CONTROL_IDX
#define SET_REG(reg, value) (ide_write_register(reg ## _IDX, value))
#define SET_16BITREG(reg, value) (ide_write_register(reg ## _IDX, value))
#define GET_REG(reg) (ide_read_register(reg))
#define ATA_DATA (GET_REG(ATA_DATA_IDX))
#define ATA_ERROR (GET_REG(ATA_ERROR_IDX))
#define ATA_NSECTOR (GET_REG(ATA_NSECTOR_IDX))
#define ATA_SECTOR (GET_REG(ATA_SECTOR_IDX))
#define ATA_LCYL (GET_REG(ATA_LCYL_IDX))
#define ATA_HCYL (GET_REG(ATA_HCYL_IDX))
#define ATA_SELECT (GET_REG(ATA_SELECT_IDX))
#define ATA_COMMAND (GET_REG(ATA_COMMAND_IDX))
#define ATA_CONTROL (GET_REG(ATA_CONTROL_IDX))
#define STATUS_BSY 0x80
#define STATUS_RDY 0x40
#define STATUS_DF 0x20
#define STATUS_DRQ 0x08
#define STATUS_ERR 0x01
#define ERROR_ABRT 0x04
#define WRITE_PATTERN1 0xa5
#define WRITE_PATTERN2 0x5a
#define WRITE_PATTERN3 0xaa
#define WRITE_PATTERN4 0x55
#define READ_PATTERN1 0xa5
#define READ_PATTERN2 0x5a
#define READ_PATTERN3 0xaa
#define READ_PATTERN4 0x55
#define READ_PATTERN1_MASK 0xff
#define READ_PATTERN2_MASK 0xff
#define READ_PATTERN3_MASK 0xff
#define READ_PATTERN4_MASK 0xff
static unsigned char ide_sector_data[SECTOR_SIZE] __attribute__ ((section(".idata")));
static unsigned ide_reg_temp __attribute__ ((section(".idata")));
void ide_write_register(int reg, int value) {
/* Archos firmware code does (sometimes!) this:
set the RAM speed to 8 cycles.
MIUSCFG |= 0x7;
*/
ide_reg_temp = value;
long extAddr = (long)reg << 16;
ddma_transfer(1, 1, &ide_reg_temp, extAddr, 2);
/* set the RAM speed to 6 cycles.
unsigned char miuscfg = MIUSCFG;
miuscfg = (miuscfg & ~7) | 5;
*/
}
int ide_read_register(int reg) {
/* set the RAM speed to 6 cycles.
unsigned char miuscfg = MIUSCFG;
miuscfg = (miuscfg & ~7) | 5;
MIUSCFG = miuscfg; */
long extAddr = (long)reg << 16;
ddma_transfer(0, 1, &ide_reg_temp, extAddr, 2);
/* This is done like this in the archos firmware...
miuscfg = MIUSCFG;
miuscfg = (miuscfg & ~7) | 5;
MIUSCFG = miuscfg;
Though I'd expect MIUSCFG &= ~0x7; (1 cycle) */
return ide_reg_temp;
}
#endif #endif
#ifndef NOINLINE_ATTR #ifndef NOINLINE_ATTR
@ -349,16 +251,7 @@ static void copy_read_sectors(unsigned char* buf, int wordcount)
} while (++wbuf < wbufend); /* tail loop is faster */ } while (++wbuf < wbufend); /* tail loop is faster */
} }
#else /* !PREFER_C_READING */ #else /* !PREFER_C_READING */
#if CONFIG_CPU == TCC730 #if defined(CPU_COLDFIRE)
int sectorcount = wordcount / 0x100;
do {
/* Slurp an entire sector with a single dma transfer */
ddma_transfer(0, 1, ide_sector_data, ATA_DATA_IDX << 16, SECTOR_SIZE);
memcpy(buf, ide_sector_data, SECTOR_SIZE);
buf += SECTOR_SIZE;
sectorcount--;
} while (sectorcount > 0);
#elif defined(CPU_COLDFIRE)
unsigned char* bufend = buf + 2 * wordcount; unsigned char* bufend = buf + 2 * wordcount;
/* coldfire asm reading, utilising line bursts */ /* coldfire asm reading, utilising line bursts */
/* this assumes there is at least one full line to copy */ /* this assumes there is at least one full line to copy */
@ -1416,23 +1309,6 @@ int ata_hard_reset(void)
/* state HRR1 */ /* state HRR1 */
or_b(0x02, &PADRH); /* negate _RESET */ or_b(0x02, &PADRH); /* negate _RESET */
sleep(1); /* > 2ms */ sleep(1); /* > 2ms */
#elif CONFIG_CPU == TCC730
P6 &= ~0x40;
ddma_transfer(0, 1, ide_sector_data, 0xF00000, SECTOR_SIZE);
P6 |= 0x40;
/*
What can the following do?
P1 |= 0x04;
P10CON &= ~0x56;
sleep(1);
P10CON |= 0x56;
P10 &= ~0x56;
P1 &= ~0x04;
sleep(1);
*/
#endif #endif
/* state HRR2 */ /* state HRR2 */
@ -1561,8 +1437,6 @@ void ata_enable(bool on)
or_b(0x80, &PADRL); /* disable ATA */ or_b(0x80, &PADRL); /* disable ATA */
or_b(0x80, &PAIORL); or_b(0x80, &PAIORL);
#elif CONFIG_CPU == TCC730
#endif #endif
} }
#endif #endif
@ -1712,8 +1586,6 @@ int ata_init(void)
int rc; int rc;
#ifdef TARGET_TREE #ifdef TARGET_TREE
bool coldstart = ata_is_coldstart(); bool coldstart = ata_is_coldstart();
#elif CONFIG_CPU == TCC730
bool coldstart = (P1 & 0x80) == 0;
#else #else
bool coldstart = (PACR2 & 0x4000) != 0; bool coldstart = (PACR2 & 0x4000) != 0;
#endif #endif

34
firmware/drivers/button.c
View file

@ -314,8 +314,6 @@ void button_init(void)
PAIOR &= ~0x0820; /* Inputs */ PAIOR &= ~0x0820; /* Inputs */
#elif CONFIG_KEYPAD == ONDIO_PAD #elif CONFIG_KEYPAD == ONDIO_PAD
/* nothing to initialize here */ /* nothing to initialize here */
#elif CONFIG_KEYPAD == GMINI100_PAD
/* nothing to initialize here */
#endif /* CONFIG_KEYPAD */ #endif /* CONFIG_KEYPAD */
queue_init(&button_queue, true); queue_init(&button_queue, true);
button_read(); button_read();
@ -599,38 +597,6 @@ static int button_read(void)
if(adc_read(ADC_BUTTON_ONOFF) < 0x120) /* active low */ if(adc_read(ADC_BUTTON_ONOFF) < 0x120) /* active low */
btn |= BUTTON_OFF; btn |= BUTTON_OFF;
#elif CONFIG_KEYPAD == GMINI100_PAD
data = adc_read(7);
if (data < 0x38a)
{
if (data < 0x1c5)
if (data < 0xe3)
btn = BUTTON_LEFT;
else
btn = BUTTON_DOWN;
else
if (data < 0x2a2)
btn = BUTTON_RIGHT;
else
btn = BUTTON_UP;
}
data = adc_read(6);
if (data < 0x355)
{
if (data < 0x288)
if (data < 0x233)
btn |= BUTTON_OFF;
else
btn |= BUTTON_PLAY;
else
btn |= BUTTON_MENU;
}
data = P7;
if (data & 0x01)
btn |= BUTTON_ON;
#endif /* CONFIG_KEYPAD */ #endif /* CONFIG_KEYPAD */
#ifdef HAVE_LCD_BITMAP #ifdef HAVE_LCD_BITMAP

28
firmware/drivers/i2c.c
View file

@ -24,26 +24,6 @@
#include "system.h" #include "system.h"
/* cute little functions, atomic read-modify-write */ /* cute little functions, atomic read-modify-write */
#if CONFIG_I2C == I2C_GMINI
/* This is done like this in the Archos' firmware.
* However, the TCC370 has an integrated I2C
* controller (bound to the same lines). It should be
* possible to use it and thus save some space in flash.
*/
#define SDA_LO (P3 &= ~0x20)
#define SDA_HI (P3 |= 0x20)
#define SDA_INPUT (P3CONH &= ~0x0C)
#define SDA_OUTPUT (P3CONH |= 0x04)
#define SDA (P3 & 0x20)
#define SCL_LO (P3 &= ~0x10)
#define SCL_HI (P3 |= 0x10)
#define SCL_INPUT (P3CONH &= ~0x03)
#define SCL_OUTPUT (P3CONH |= 0x01)
#define SCL (P3 & 0x10)
#else /* non Gmini below */
/* SDA is PB7 */ /* SDA is PB7 */
#define SDA_LO and_b(~0x80, &PBDRL) #define SDA_LO and_b(~0x80, &PBDRL)
@ -67,7 +47,6 @@
#define SCL_HI or_b(0x20, &PBDRH) #define SCL_HI or_b(0x20, &PBDRH)
#define SCL (PBDRH & 0x20) #define SCL (PBDRH & 0x20)
#endif #endif
#endif /* ! I2C_GMINI */
/* arbitrary delay loop */ /* arbitrary delay loop */
#define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0) #define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
@ -106,13 +85,10 @@ void i2c_init(void)
{ {
int i; int i;
#if CONFIG_I2C == I2C_GMINI #if CONFIG_I2C == I2C_ONDIO
SCL_INPUT;
SDA_INPUT;
#elif CONFIG_I2C == I2C_ONDIO
/* make PB6 & PB7 general I/O */ /* make PB6 & PB7 general I/O */
PBCR2 &= ~0xf000; PBCR2 &= ~0xf000;
#else /* not Gmini, not Ondio */ #else /* not Ondio */
/* make PB7 & PB13 general I/O */ /* make PB7 & PB13 general I/O */
PBCR1 &= ~0x0c00; /* PB13 */ PBCR1 &= ~0x0c00; /* PB13 */
PBCR2 &= ~0xc000; /* PB7 */ PBCR2 &= ~0xc000; /* PB7 */

59
firmware/drivers/lcd-recorder.c
View file

@ -108,35 +108,7 @@ static const char scroll_tick_table[16] = {
/* optimised archos recorder code is in lcd.S */ /* optimised archos recorder code is in lcd.S */
#if CONFIG_CPU == TCC730 #if CONFIG_CPU == PNX0101
/* Optimization opportunity:
In the following I do exactly as in the archos firmware.
There is probably a better way (ie. do only one mask operation)
*/
void lcd_write_command(int cmd) {
P2 &= 0xF7;
P2 &= 0xDF;
P2 &= 0xFB;
P0 = cmd;
P2 |= 0x04;
P2 |= 0x08;
P2 |= 0x20;
}
void lcd_write_data( const unsigned char* data, int count ) {
int i;
for (i=0; i < count; i++) {
P2 |= 0x08;
P2 &= 0xDF;
P2 &= 0xFB;
P0 = data[i];
P2 |= 0x04;
P2 |= 0x08;
P2 |= 0x20;
}
}
#elif CONFIG_CPU == PNX0101
void lcd_write_command(int cmd) void lcd_write_command(int cmd)
{ {
@ -161,9 +133,7 @@ void lcd_write_data( const unsigned char* data, int count )
int lcd_default_contrast(void) int lcd_default_contrast(void)
{ {
#if CONFIG_LCD == LCD_GMINI100 #if CONFIG_LCD == LCD_IFP7XX
return 31;
#elif CONFIG_LCD == LCD_IFP7XX
return 45; return 45;
#else #else
return (read_hw_mask() & LCD_CONTRAST_BIAS) ? 31 : 49; return (read_hw_mask() & LCD_CONTRAST_BIAS) ? 31 : 49;
@ -192,20 +162,6 @@ void lcd_set_flip(bool yesno)
#else #else
if (yesno) if (yesno)
#endif #endif
#if CONFIG_LCD == LCD_GMINI100
{
lcd_write_command(LCD_SET_SEGMENT_REMAP | 0x01);
lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION | 0x08);
xoffset = 132 - LCD_WIDTH;
}
else
{
lcd_write_command(LCD_SET_SEGMENT_REMAP);
lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION | 0x08);
xoffset = 0;
}
#else
{ {
lcd_write_command(LCD_SET_SEGMENT_REMAP); lcd_write_command(LCD_SET_SEGMENT_REMAP);
lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION); lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION);
@ -221,7 +177,6 @@ void lcd_set_flip(bool yesno)
xoffset = 0; xoffset = 0;
#endif #endif
} }
#endif
} }
#endif /* !SIMULATOR */ #endif /* !SIMULATOR */
@ -238,15 +193,7 @@ void lcd_init(void)
void lcd_init(void) void lcd_init(void)
{ {
#if CONFIG_CPU == TCC730 #if CONFIG_CPU == PNX0101
/* Initialise P0 & some P2 output pins:
P0 -> all pins normal cmos output
P2 -> pins 1 to 5 normal cmos output. */
P0CON = 0xff;
P2CONL |= 0x5a;
P2CONL &= 0x5b;
P2CONH |= 1;
#elif CONFIG_CPU == PNX0101
LCDREG10 = 0xf; LCDREG10 = 0xf;
LCDREG04 = 0x4084; LCDREG04 = 0x4084;
#else #else

6
firmware/drivers/led.c
View file

@ -28,11 +28,6 @@
void led(bool on) void led(bool on)
{ {
if ( on ) if ( on )
#ifdef GMINI_ARCH
P2 |= 1;
else
P2 &= ~1;
#else
{ {
or_b(0x40, &PBDRL); or_b(0x40, &PBDRL);
} }
@ -40,7 +35,6 @@ void led(bool on)
{ {
and_b(~0x40, &PBDRL); and_b(~0x40, &PBDRL);
} }
#endif
} }
#elif (CONFIG_LED == LED_VIRTUAL) || defined(HAVE_REMOTE_LCD) #elif (CONFIG_LED == LED_VIRTUAL) || defined(HAVE_REMOTE_LCD)

20
firmware/drivers/power.c
View file

@ -86,9 +86,7 @@ void power_init(void)
#ifdef CONFIG_CHARGING #ifdef CONFIG_CHARGING
bool charger_inserted(void) bool charger_inserted(void)
{ {
#if defined(GMINI_ARCH) #if CONFIG_CHARGING == CHARGING_CONTROL
return (P7 & 0x80) == 0;
#elif CONFIG_CHARGING == CHARGING_CONTROL
/* Recorder */ /* Recorder */
return adc_read(ADC_EXT_POWER) > 0x100; return adc_read(ADC_EXT_POWER) > 0x100;
#elif defined (HAVE_FMADC) #elif defined (HAVE_FMADC)
@ -139,12 +137,7 @@ void ide_power_enable(bool on)
{ {
(void)on; (void)on;
#if defined(GMINI_ARCH) #if defined(TOSHIBA_GIGABEAT_F)
if(on)
P1 |= 0x08;
else
P1 &= ~0x08;
#elif defined(TOSHIBA_GIGABEAT_F)
/* Gigabeat TODO */ /* Gigabeat TODO */
#else /* SH1 based archos */ #else /* SH1 based archos */
bool touched = false; bool touched = false;
@ -189,9 +182,7 @@ void ide_power_enable(bool on)
bool ide_powered(void) bool ide_powered(void)
{ {
#if defined(GMINI_ARCH) #if defined(TOSHIBA_GIGABEAT_F)
return (P1 & 0x08?true:false);
#elif defined(TOSHIBA_GIGABEAT_F)
return false; return false;
#else /* SH1 based archos */ #else /* SH1 based archos */
#if defined(NEEDS_ATA_POWER_ON) || defined(HAVE_ATA_POWER_OFF) #if defined(NEEDS_ATA_POWER_ON) || defined(HAVE_ATA_POWER_OFF)
@ -220,10 +211,7 @@ bool ide_powered(void)
void power_off(void) void power_off(void)
{ {
set_irq_level(HIGHEST_IRQ_LEVEL); set_irq_level(HIGHEST_IRQ_LEVEL);
#if defined(GMINI_ARCH) #if defined(TOSHIBA_GIGABEAT_F)
P1 &= ~1;
P1CON &= ~1;
#elif defined(TOSHIBA_GIGABEAT_F)
/* FIXME: Can we turn the device off, or only enter sleep mode? */ /* FIXME: Can we turn the device off, or only enter sleep mode? */
#else #else
#ifdef HAVE_POWEROFF_ON_PBDR #ifdef HAVE_POWEROFF_ON_PBDR

4
firmware/drivers/serial.c
View file

@ -30,7 +30,7 @@
#if CONFIG_CPU == SH7034 #if CONFIG_CPU == SH7034
/* FIX: this doesn't work on iRiver or Gmini or iPod yet */ /* FIX: this doesn't work on iRiver or iPod yet */
/* iFP7xx has no remote */ /* iFP7xx has no remote */
#ifndef HAVE_MMC /* MMC takes serial port 1, so don't mess with it */ #ifndef HAVE_MMC /* MMC takes serial port 1, so don't mess with it */
@ -172,4 +172,4 @@ void serial_setup (void)
{ {
/* a dummy */ /* a dummy */
} }
#endif /* ! (CONFIG_CPU != MCF5249) && (CONFIG_CPU != TCC730) */ #endif

23
firmware/export/button.h
View file

@ -151,27 +151,6 @@ void wheel_send_events(bool send);
#define BUTTON_REMOTE 0 #define BUTTON_REMOTE 0
#elif CONFIG_KEYPAD == GMINI100_PAD
/* Gmini specific button codes */
#define BUTTON_ON 0x00000001
#define BUTTON_OFF 0x00000002
#define BUTTON_LEFT 0x00000004
#define BUTTON_RIGHT 0x00000008
#define BUTTON_UP 0x00000010
#define BUTTON_DOWN 0x00000020
#define BUTTON_PLAY 0x00000040
#define BUTTON_MENU 0x00000080
#define BUTTON_MAIN (BUTTON_ON|BUTTON_OFF|BUTTON_LEFT|BUTTON_RIGHT\
|BUTTON_UP|BUTTON_DOWN|BUTTON_PLAY|BUTTON_MENU)
#define BUTTON_REMOTE 0
#elif 0 #elif 0
/* /*
@ -186,7 +165,7 @@ void wheel_send_events(bool send);
#endif /* RECORDER/PLAYER/ONDIO/GMINI KEYPAD */ #endif /* RECORDER/PLAYER/ONDIO KEYPAD */
#endif /* TARGET_TREE */ #endif /* TARGET_TREE */

86
firmware/export/config-gmini120.h
View file

@ -1,86 +0,0 @@
/* Note: this is just a basic early version that needs attention and
corrections! */
/* define this if you have recording possibility */
#define HAVE_RECORDING 1
/* define this if you have a bitmap LCD display */
#define HAVE_LCD_BITMAP 1
/* define this if you can invert the colours on your LCD */
#define HAVE_LCD_INVERT
/* define this if you have a real-time clock */
#define CONFIG_RTC RTC_M41ST84W
/* define this if you have RTC RAM available for settings */
#define HAVE_RTC_RAM 1
/* define this if you would like tagcache to build on this target */
#define HAVE_TAGCACHE
/* LCD dimensions */
#define LCD_WIDTH 128
#define LCD_HEIGHT 64
#define LCD_DEPTH 1
#define CONFIG_KEYPAD GMINI100_PAD
/* Define this if you have a software controlled poweroff */
#define HAVE_SW_POWEROFF
/* The number of bytes reserved for loadable codecs. Although in this case
the codec won't be loadable... */
#define CODEC_SIZE 0x40000
/* The number of bytes reserved for loadable plugins */
#define PLUGIN_BUFFER_SIZE 0x80000
#define BATTERY_CAPACITY_DEFAULT 2200 /* default battery capacity */
#ifndef SIMULATOR
/* Define this if you have a TCC730 (CalmRISC16) */
#define CONFIG_CPU TCC730
/* Define this if you have a gmini 100 style LCD */
#define CONFIG_LCD LCD_GMINI100
#define CONFIG_I2C I2C_GMINI
/* Define this if you do software codec */
#define CONFIG_CODEC SWCODEC
/* Type of mobile power, FIXME: probably different, make new type */
#define CONFIG_BATTERY BATT_LIION2200
#define BATTERY_CAPACITY_MIN 2200 /* min. capacity selectable */
#define BATTERY_CAPACITY_MAX 3200 /* max. capacity selectable */
#define BATTERY_CAPACITY_INC 50 /* capacity increment */
#define BATTERY_TYPES_COUNT 1 /* only one type */
#define BATTERY_SCALE_FACTOR 6465
/* chosen values at random -- jyp */
/* Hardware controlled charging? FIXME */
#define CONFIG_CHARGING CHARGING_SIMPLE
#define CPU_FREQ 30000000
/* approximate value (and false in general since freq is variable) */
/* Always enable debug till we stabilize */
#define EMULATOR
#define USB_GMINISTYLE
#define CONFIG_I2C I2C_GMINI
#define CONFIG_BACKLIGHT BL_GMINI
#define GMINI_ARCH
/* Software controlled LED */
#define CONFIG_LED LED_REAL
/* Define this if you have adjustable CPU frequency */
#define HAVE_ADJUSTABLE_CPU_FREQ
#endif

77
firmware/export/config-gminisp.h
View file

@ -1,77 +0,0 @@
/* Note: this is just a basic early version that needs attention and
corrections! */
/* define this if you have a bitmap LCD display */
#define HAVE_LCD_BITMAP 1
/* define this if you can invert the colours on your LCD */
#define HAVE_LCD_INVERT
/* define this if you would like tagcache to build on this target */
#define HAVE_TAGCACHE
/* LCD dimensions */
#define LCD_WIDTH 128
#define LCD_HEIGHT 64
#define LCD_DEPTH 1
#define CONFIG_KEYPAD GMINI100_PAD
/* Define this if you have a software controlled poweroff */
#define HAVE_SW_POWEROFF
/* The number of bytes reserved for loadable codecs. Although in this case
the codec won't be loadable... */
#define CODEC_SIZE 0x40000
/* The number of bytes reserved for loadable plugins */
#define PLUGIN_BUFFER_SIZE 0x80000
#define BATTERY_CAPACITY_DEFAULT 2200 /* default battery capacity */
#ifndef SIMULATOR
/* Define this if you have a TCC730 (CalmRISC16) */
#define CONFIG_CPU TCC730
/* Define this if you have a gmini 100 style LCD */
#define CONFIG_LCD LCD_GMINI100
#define CONFIG_I2C I2C_GMINI
/* Define this if you do software codec */
#define CONFIG_CODEC SWCODEC
/* Type of mobile power, FIXME: probably different, make new type */
#define CONFIG_BATTERY BATT_LIION2200
#define BATTERY_CAPACITY_MIN 2200 /* min. capacity selectable */
#define BATTERY_CAPACITY_MAX 3200 /* max. capacity selectable */
#define BATTERY_CAPACITY_INC 50 /* capacity increment */
#define BATTERY_TYPES_COUNT 1 /* only one type */
#define BATTERY_SCALE_FACTOR 6465
/* chosen values at random -- jyp */
/* Hardware controlled charging? FIXME */
#define CONFIG_CHARGING CHARGING_SIMPLE
#define CPU_FREQ 30000000
/* approximate value (and false in general since freq is variable) */
/* Always enable debug till we stabilize */
#define EMULATOR
#define USB_GMINISTYLE
#define CONFIG_I2C I2C_GMINI
#define CONFIG_BACKLIGHT BL_GMINI
#define GMINI_ARCH
/* Software controlled LED */
#define CONFIG_LED LED_REAL
/* Define this if you have adjustable CPU frequency */
#define HAVE_ADJUSTABLE_CPU_FREQ
#endif

32
firmware/export/config.h
View file

@ -40,7 +40,6 @@
#define SH7034 7034 #define SH7034 7034
#define MCF5249 5249 #define MCF5249 5249
#define MCF5250 5250 #define MCF5250 5250
#define TCC730 730 /* lacking a proper abbrivation */
#define PP5002 5002 #define PP5002 5002
#define PP5020 5020 #define PP5020 5020
#define PNX0101 101 #define PNX0101 101
@ -48,11 +47,10 @@
#define PP5024 5024 #define PP5024 5024
/* CONFIG_KEYPAD */ /* CONFIG_KEYPAD */
#define PLAYER_PAD 0 #define PLAYER_PAD 1
#define RECORDER_PAD 1 #define RECORDER_PAD 2
#define ONDIO_PAD 2 #define ONDIO_PAD 3
#define IRIVER_H100_PAD 3 #define IRIVER_H100_PAD 4
#define GMINI100_PAD 4
#define IRIVER_H300_PAD 5 #define IRIVER_H300_PAD 5
#define IAUDIO_X5_PAD 6 #define IAUDIO_X5_PAD 6
#define IPOD_4G_PAD 7 #define IPOD_4G_PAD 7
@ -83,7 +81,6 @@
#define CHARGING_CONTROL 3 /* Software controlled charging */ #define CHARGING_CONTROL 3 /* Software controlled charging */
/* CONFIG_LCD */ /* CONFIG_LCD */
#define LCD_GMINI100 0
#define LCD_SSD1815 1 /* as used by Archos Recorders and Ondios */ #define LCD_SSD1815 1 /* as used by Archos Recorders and Ondios */
#define LCD_SSD1801 2 /* as used by Archos Player/Studio */ #define LCD_SSD1801 2 /* as used by Archos Player/Studio */
#define LCD_S1D15E06 3 /* as used by iRiver H100 series */ #define LCD_S1D15E06 3 /* as used by iRiver H100 series */
@ -111,11 +108,10 @@
#define RGB565SWAPPED 3553 #define RGB565SWAPPED 3553
/* CONFIG_BACKLIGHT */ /* CONFIG_BACKLIGHT */
#define BL_PA14_LO 0 /* Player, PA14 low active */ #define BL_PA14_LO 1 /* Player, PA14 low active */
#define BL_RTC 1 /* Recorder, RTC square wave output */ #define BL_RTC 2 /* Recorder, RTC square wave output */
#define BL_PA14_HI 2 /* Ondio, PA14 high active */ #define BL_PA14_HI 3 /* Ondio, PA14 high active */
#define BL_IRIVER_H100 3 /* IRiver GPIO */ #define BL_IRIVER_H100 4 /* IRiver GPIO */
#define BL_GMINI 4 /* Archos GMini */
#define BL_IPOD4G 5 /* Apple iPod 4G */ #define BL_IPOD4G 5 /* Apple iPod 4G */
#define BL_IPODNANO 6 /* Apple iPod Nano and iPod Video*/ #define BL_IPODNANO 6 /* Apple iPod Nano and iPod Video*/
#define BL_IPOD3G 7 /* Apple iPod 3g with dock */ #define BL_IPOD3G 7 /* Apple iPod 3g with dock */
@ -129,9 +125,8 @@
#define BL_TPJ1022 15 /* Tatung Elio TPJ-1022 */ #define BL_TPJ1022 15 /* Tatung Elio TPJ-1022 */
/* CONFIG_I2C */ /* CONFIG_I2C */
#define I2C_PLAYREC 0 /* Archos Player/Recorder style */ #define I2C_PLAYREC 1 /* Archos Player/Recorder style */
#define I2C_ONDIO 1 /* Ondio style */ #define I2C_ONDIO 2 /* Ondio style */
#define I2C_GMINI 2 /* Gmini style */
#define I2C_COLDFIRE 3 /* Coldfire style */ #define I2C_COLDFIRE 3 /* Coldfire style */
#define I2C_PP5002 4 /* PP5002 style */ #define I2C_PP5002 4 /* PP5002 style */
#define I2C_PP5020 5 /* PP5020 style */ #define I2C_PP5020 5 /* PP5020 style */
@ -139,7 +134,7 @@
#define I2C_S3C2440 7 #define I2C_S3C2440 7
/* CONFIG_LED */ /* CONFIG_LED */
#define LED_REAL 1 /* SW controlled LED (Archos recorders, player, Gmini) */ #define LED_REAL 1 /* SW controlled LED (Archos recorders, player) */
#define LED_VIRTUAL 2 /* Virtual LED (icon) (Archos Ondio) */ #define LED_VIRTUAL 2 /* Virtual LED (icon) (Archos Ondio) */
/* else HW controlled LED (iRiver H1x0) */ /* else HW controlled LED (iRiver H1x0) */
@ -180,10 +175,6 @@
#include "config-h120.h" #include "config-h120.h"
#elif defined(IRIVER_H300) #elif defined(IRIVER_H300)
#include "config-h300.h" #include "config-h300.h"
#elif defined(ARCHOS_GMINI120)
#include "config-gmini120.h"
#elif defined(ARCHOS_GMINISP)
#include "config-gminisp.h"
#elif defined(IAUDIO_X5) #elif defined(IAUDIO_X5)
#include "config-iaudiox5.h" #include "config-iaudiox5.h"
#elif defined(IPOD_COLOR) #elif defined(IPOD_COLOR)
@ -286,7 +277,6 @@
defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \ defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \
(CONFIG_CPU == PP5020) || /* iPod and H10: core, plugins, codecs */ \ (CONFIG_CPU == PP5020) || /* iPod and H10: core, plugins, codecs */ \
(CONFIG_CPU == PP5002) || /* iPod: core, plugins, codecs */ \ (CONFIG_CPU == PP5002) || /* iPod: core, plugins, codecs */ \
(CONFIG_CPU == TCC730) || /* CalmRISC16: core, (plugins, codecs) */ \
(CONFIG_CPU == PNX0101)) (CONFIG_CPU == PNX0101))
#define ICODE_ATTR __attribute__ ((section(".icode"))) #define ICODE_ATTR __attribute__ ((section(".icode")))
#define ICONST_ATTR __attribute__ ((section(".irodata"))) #define ICONST_ATTR __attribute__ ((section(".irodata")))

3
firmware/export/cpu.h
View file

@ -27,9 +27,6 @@
#if CONFIG_CPU == MCF5250 #if CONFIG_CPU == MCF5250
#include "mcf5250.h" #include "mcf5250.h"
#endif #endif
#if CONFIG_CPU == TCC730
#include "tcc730.h"
#endif
#if CONFIG_CPU == PP5020 #if CONFIG_CPU == PP5020
#include "pp5020.h" #include "pp5020.h"
#endif #endif

66
firmware/export/system.h
View file

@ -371,72 +371,6 @@ void irq_set_int_handler(int n, interrupt_handler_t handler);
void irq_enable_int(int n); void irq_enable_int(int n);
#endif #endif
#elif CONFIG_CPU == TCC730
extern int smsc_version(void);
extern void smsc_delay(void);
extern void set_pll_freq(int pll_index, long freq_out);
extern void* volatile interrupt_vector[16] __attribute__ ((section(".idata")));
extern void ddma_transfer(int dir, int mem, void* intAddr, long extAddr,
int num);
#define HIGHEST_IRQ_LEVEL (1)
static inline int set_irq_level(int level)
{
int result;
__asm__ ("ld %0, 0\n\t"
"tstsr ie\n\t"
"incc %0" : "=r"(result));
if (level > 0)
__asm__ volatile ("clrsr ie");
else
__asm__ volatile ("setsr ie");
return result;
}
static inline unsigned short swap16(unsigned short value)
/*
result[15..8] = value[ 7..0];
result[ 7..0] = value[15..8];
*/
{
return (value >> 8) | (value << 8);
}
static inline unsigned long swap32(unsigned long value)
/*
result[31..24] = value[ 7.. 0];
result[23..16] = value[15.. 8];
result[15.. 8] = value[23..16];
result[ 7.. 0] = value[31..24];
*/
{
unsigned long hi = swap16(value >> 16);
unsigned long lo = swap16(value & 0xffff);
return (lo << 16) | hi;
}
/* Archos uses:
22MHz: busy wait on dma
32MHz: normal
80Mhz: heavy load
*/
#define CPUFREQ_DEFAULT CPU_FREQ
#define CPUFREQ_NORMAL (32000000)
#define CPUFREQ_MAX (80000000)
#define invalidate_icache()
#endif #endif
#ifndef CPU_COLDFIRE #ifndef CPU_COLDFIRE

107
firmware/export/tcc730.h
View file

@ -1,107 +0,0 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2005 by Jean-Philippe Bernardy
*
* All files in this archive are subject to the GNU General Public License.
* See the file COPYING in the source tree root for full license agreement.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef TCC730_H
#define TCC730_H
/* int is 16 bit
long is 32 bit */
#define IOBASE (0x3f0000)
#define MMIO(t, x) (*(volatile t*)(IOBASE+(x)))
#define OSCCON MMIO(unsigned char, 0x01)
#define WTCON MMIO(unsigned char, 0x02)
#define BTCON MMIO(unsigned char, 0x04)
#define BTCNT MMIO(unsigned char, 0x05)
#define WDTEN MMIO(unsigned char, 0x06)
#define WDTCON MMIO(unsigned char, 0x07)
#define TACON MMIO(unsigned char, 0x08)
#define TAPRE MMIO(unsigned char, 0x09)
#define TADATA MMIO(unsigned int, 0x0A)
#define TACNT MMIO(unsigned int, 0x0C)
#define IMR0 MMIO(unsigned int, 0x22)
#define IMR1 MMIO(unsigned int, 0x2A)
#define P0 MMIO(unsigned char, 0x30)
#define P1 MMIO(unsigned char, 0x31)
#define P2 MMIO(unsigned char, 0x32)
#define P3 MMIO(unsigned char, 0x33)
#define P4 MMIO(unsigned char, 0x34)
#define P5 MMIO(unsigned char, 0x35)
#define P6 MMIO(unsigned char, 0x36)
#define P7 MMIO(unsigned char, 0x37)
#define P8 MMIO(unsigned char, 0x38)
#define P9 MMIO(unsigned char, 0x39)
#define P10 MMIO(unsigned char, 0x3A)
#define P0CON MMIO(unsigned char,0x40)
#define P1CON MMIO(unsigned char,0x41)
#define P2CON MMIO(unsigned int,0x42)
#define P2CONH MMIO(unsigned char,0x42)
#define P2CONL MMIO(unsigned char,0x43)
#define P3CON MMIO(unsigned int,0x44)
#define P3CONH MMIO(unsigned char,0x44)
#define P3CONL MMIO(unsigned char,0x45)
#define P3PUR MMIO(unsigned char,0x46)
#define P5CON MMIO(unsigned char,0x48)
#define P5PUR MMIO(unsigned char,0x49)
#define P5INTMOD MMIO(unsigned int,0x4A)
#define P5INTCON MMIO(unsigned char,0x4C)
#define P4CON MMIO(unsigned char,0x50)
#define P4INTCON MMIO(unsigned char,0x51)
#define P4INTMOD MMIO(unsigned char,0x52)
#define P6CON MMIO(unsigned char,0x53)
#define P7CON MMIO(unsigned char,0x54)
#define P8CON MMIO(unsigned char,0x55)
#define P9CON MMIO(unsigned char,0x56)
#define P10CON MMIO(unsigned char,0x57)
#define IISCON0 MMIO(unsigned char, 0x0a0)
#define IISMODE0 MMIO(unsigned char, 0x0a1)
#define IISPTR0 MMIO(unsigned char, 0x0a2)
#define IISCON1 MMIO(unsigned char, 0x0a3)
#define IISMODE1 MMIO(unsigned char, 0x0a4)
#define IISPTR1 MMIO(unsigned char, 0x0a5)
#define ADDATA MMIO(unsigned int, 0x74)
#define ADCON MMIO(unsigned char, 0x76)
#define PLL0DATA MMIO(unsigned int, 0xA8)
#define PLL0CON MMIO(unsigned char, 0xAA)
#define PLL1DATA MMIO(unsigned int, 0xAC)
#define PLL1CON MMIO(unsigned char, 0xAE)
#define IISBUF ((volatile unsigned int*)(IOBASE+(0x0c0)))
#define MIUSCFG MMIO(unsigned char, 0x110)
#define MIUDCOM MMIO(unsigned char, 0x111)
#define MIUDCFG MMIO(unsigned int, 0x112)
#define MIUDCNT MMIO(unsigned int, 0x114)
#define DDMACOM MMIO(unsigned char, 0x120)
#define DDMACFG MMIO(unsigned char, 0x121)
#define DDMAIADR MMIO(unsigned long, 0x122)
#define DDMAEADR MMIO(unsigned long, 0x126)
#define DDMANUM MMIO(unsigned int, 0x12A)
#define DDMACNT MMIO(unsigned int, 0x12C)
#endif

7
firmware/export/thread.h
View file

@ -74,13 +74,6 @@ struct regs
unsigned int lr; /* r14 (lr) */ unsigned int lr; /* r14 (lr) */
void *start; /* Thread start address, or NULL when started */ void *start; /* Thread start address, or NULL when started */
}; };
# elif CONFIG_CPU == TCC730
struct regs
{
void *sp; /* Stack pointer (a15) */
void *start; /* Thread start address */
int started; /* 0 when not started */
};
# endif # endif
#endif /* !SIMULATOR */ #endif /* !SIMULATOR */

6
firmware/hwcompat.c
View file

@ -22,18 +22,14 @@
int read_rom_version(void) int read_rom_version(void)
{ {
#ifdef GMINI_ARCH
int ver = 0;
#else
int ver = *(short *)0x020000fe; int ver = *(short *)0x020000fe;
#endif
return ver; return ver;
} }
int read_hw_mask(void) int read_hw_mask(void)
{ {
#if defined(ARCHOS_PLAYER) || defined(GMINI_ARCH) #ifdef ARCHOS_PLAYER
int mask = 0; /* Fake value for simplicity */ int mask = 0; /* Fake value for simplicity */
#else #else
int mask = *(short *)0x020000fc; int mask = *(short *)0x020000fc;

57
firmware/kernel.c
View file

@ -314,63 +314,6 @@ void TIMER0(void)
TER0 = 0xff; /* Clear all events */ TER0 = 0xff; /* Clear all events */
} }
#elif CONFIG_CPU == TCC730
void TIMER0(void)
{
int i;
/* Keep alive (?)
* If this is not done, power goes down when DC is unplugged.
*/
if (current_tick % 2 == 0)
P8 |= 1;
else
P8 &= ~1;
/* Run through the list of tick tasks */
for(i = 0;i < MAX_NUM_TICK_TASKS;i++)
{
if(tick_funcs[i])
{
tick_funcs[i]();
}
}
current_tick++;
/* re-enable timer by clearing the counter */
TACON |= 0x80;
}
void tick_start(unsigned int interval_in_ms)
{
long count;
count = (long)FREQ * (long)interval_in_ms / 1000 / 16;
if(count > 0xffffL)
{
panicf("Error! The tick interval is too long (%dms->%lx)\n",
interval_in_ms, count);
return;
}
/* Use timer A */
TAPRE = 0x0;
TADATA = count;
TACON = 0x89;
/* counter clear; */
/* interval mode; */
/* TICS = F(osc) / 16 */
/* TCS = internal clock */
/* enable */
/* enable the interrupt */
interrupt_vector[2] = TIMER0;
IMR0 |= (1<<2);
}
#elif defined(CPU_PP) #elif defined(CPU_PP)
#ifndef BOOTLOADER #ifndef BOOTLOADER

8
firmware/rolo.c
View file

@ -30,10 +30,10 @@
#include "string.h" #include "string.h"
#include "buffer.h" #include "buffer.h"
#if (CONFIG_CPU != TCC730) && !defined(IRIVER_IFP7XX_SERIES) && \ #if !defined(IRIVER_IFP7XX_SERIES) && \
(CONFIG_CPU != PP5002) && !defined(IRIVER_H10) && \ (CONFIG_CPU != PP5002) && !defined(IRIVER_H10) && \
!defined(IRIVER_H10_5GB) && (CONFIG_CPU != S3C2440) !defined(IRIVER_H10_5GB) && (CONFIG_CPU != S3C2440)
/* FIX: this doesn't work on Gmini, iFP, 3rd Gen ipods, or H10 yet */ /* FIX: this doesn't work on iFP, 3rd Gen ipods, or H10 yet */
#define IRQ0_EDGE_TRIGGER 0x80 #define IRQ0_EDGE_TRIGGER 0x80
@ -243,7 +243,7 @@ int rolo_load(const char* filename)
return 0; /* this is never reached */ return 0; /* this is never reached */
} }
#else /* (CONFIG_CPU != TCC730) && !defined(IRIVER_IFP7XX_SERIES) */ #else /* !defined(IRIVER_IFP7XX_SERIES) */
int rolo_load(const char* filename) int rolo_load(const char* filename)
{ {
/* dummy */ /* dummy */
@ -251,4 +251,4 @@ int rolo_load(const char* filename)
return 0; return 0;
} }
#endif /* (CONFIG_CPU != TCC730) && !defined(IRIVER_IFP7XX_SERIES) */ #endif /* !defined(IRIVER_IFP7XX_SERIES) */

238
firmware/system.c
View file

@ -152,243 +152,7 @@ bool detect_flashed_rockbox(void)
#endif /* HAVE_FLASHED_ROCKBOX */ #endif /* HAVE_FLASHED_ROCKBOX */
} }
#if CONFIG_CPU == TCC730 #if CONFIG_CPU == SH7034
void* volatile interrupt_vector[16] __attribute__ ((section(".idata")));
static void ddma_wait_idle(void) __attribute__ ((section (".icode")));
static void ddma_wait_idle(void)
{
/* TODO: power saving trick: set the CPU freq to 22MHz
while doing the busy wait after a disk dma access.
(Used by Archos) */
do {
} while ((DDMACOM & 3) != 0);
}
void ddma_transfer(int dir, int mem, void* intAddr, long extAddr, int num)
__attribute__ ((section (".icode")));
void ddma_transfer(int dir, int mem, void* intAddr, long extAddr, int num) {
int irq = set_irq_level(1);
ddma_wait_idle();
long externalAddress = (long) extAddr;
long internalAddress = ((long) intAddr) & 0xFFFF;
/* HW wants those two in word units. */
num /= 2;
externalAddress /= 2;
DDMACFG = (dir << 1) | (mem << 2);
DDMAIADR = internalAddress;
DDMAEADR = externalAddress;
DDMANUM = num;
DDMACOM |= 0x4; /* start */
ddma_wait_idle(); /* wait for completion */
set_irq_level(irq);
}
static void ddma_wait_idle_noicode(void)
{
do {
} while ((DDMACOM & 3) != 0);
}
static void ddma_transfer_noicode(int dir, int mem, long intAddr, long extAddr, int num) {
int irq = set_irq_level(1);
ddma_wait_idle_noicode();
long externalAddress = (long) extAddr;
long internalAddress = (long) intAddr;
/* HW wants those two in word units. */
num /= 2;
externalAddress /= 2;
DDMACFG = (dir << 1) | (mem << 2);
DDMAIADR = internalAddress;
DDMAEADR = externalAddress;
DDMANUM = num;
DDMACOM |= 0x4; /* start */
ddma_wait_idle_noicode(); /* wait for completion */
set_irq_level(irq);
}
/* Some linker-defined symbols */
extern int icodecopy;
extern int icodesize;
extern int icodestart;
/* change the a PLL frequency */
void set_pll_freq(int pll_index, long freq_out) {
volatile unsigned int* plldata;
volatile unsigned char* pllcon;
if (pll_index == 0) {
plldata = &PLL0DATA;
pllcon = &PLL0CON;
} else {
plldata = &PLL1DATA;
pllcon = &PLL1CON;
}
/* VC0 is 32768 Hz */
#define VC0FREQ (32768L)
unsigned m = (freq_out / VC0FREQ) - 2;
/* TODO: if m is too small here, use the divider bits [0,1] */
*plldata = m << 2;
*pllcon |= 0x1; /* activate */
do {
} while ((*pllcon & 0x2) == 0); /* wait for stabilization */
}
int smsc_version(void) {
int v;
int* smsc_ver_addr = (int*)0x4C20;
__asm__ ("ldc %0, @%1" : "=r"(v) : "a"(smsc_ver_addr));
v &= 0xFF;
if (v < 4 || v == 0xFF) {
return 3;
}
return v;
}
void smsc_delay() {
int i;
/* FIXME: tune the delay.
Delay doesn't depend on CPU speed in Archos' firmware.
*/
for (i = 0; i < 100; i++) {
}
}
static void extra_init(void) {
/* Power on stuff */
P1 |= 0x07;
P1CON |= 0x1f;
/* P5 conf
* lines 0, 1 & 4 are digital, other analog. :
*/
P5CON = 0xec;
P6CON = 0x19;
/* P7 conf
nothing to do: all are inputs
(reset value of the register is good)
*/
/* SMSC chip config (?) */
P10CON |= 0x20;
P6 &= 0xF7;
P10 &= 0x20;
smsc_delay();
if (smsc_version() < 4) {
P6 |= 0x08;
P10 |= 0x20;
}
}
void set_cpu_frequency(long frequency) {
/* Enable SDRAM refresh, at least 15MHz */
if (frequency < cpu_frequency)
MIUDCNT = 0x800 | (frequency * 15/1000000L - 1);
set_pll_freq(0, frequency);
PLL0CON |= 0x4; /* use as CPU clock */
cpu_frequency = frequency;
/* wait states and such not changed by Archos. (!?) */
/* Enable SDRAM refresh, 15MHz. */
MIUDCNT = 0x800 | (frequency * 15/1000000L - 1);
tick_start(1000/HZ);
/* TODO: when uart is done; sync uart freq */
}
/* called by crt0 */
void system_init(void)
{
/* Disable watchdog */
WDTEN = 0xA5;
/****************
* GPIO ports
*/
/* keep alive (?) -- clear the bit to prevent crash at start (??) */
P8 = 0x00;
P8CON = 0x01;
/* smsc chip init (?) */
P10 = 0x20;
P6 = 0x08;
P10CON = 0x20;
P6CON = 0x08;
/********
* CPU
*/
/* PLL0 (cpu osc. frequency) */
/* set_cpu_frequency(CPU_FREQ); */
/*******************
* configure S(D)RAM
*/
/************************
* Copy .icode section to icram
*/
ddma_transfer_noicode(0, 0, 0x40, (long)&icodecopy, (int)&icodesize);
/***************************
* Interrupts
*/
/* priorities ? */
/* mask */
IMR0 = 0;
IMR1 = 0;
/* IRQ0 BT INT */
/* IRQ1 RTC INT */
/* IRQ2 TA INT */
/* IRQ3 TAOV INT */
/* IRQ4 TB INT */
/* IRQ5 TBOV INT */
/* IRQ6 TC INT */
/* IRQ7 TCOV INT */
/* IRQ8 USB INT */
/* IRQ9 PPIC INT */
/* IRQ10 UART_Rx/UART_Err/ UART_tx INT */
/* IRQ11 IIC INT */
/* IRQ12 SIO INT */
/* IRQ13 IIS0 INT */
/* IRQ14 IIS1 INT */
/* IRQ15 */
extra_init();
}
void system_reboot (void)
{
}
int system_memory_guard(int newmode)
{
(void)newmode;
return 0;
}
#elif CONFIG_CPU == SH7034
#include "led.h" #include "led.h"
#include "system.h" #include "system.h"
#include "rolo.h" #include "rolo.h"

64
firmware/thread.c
View file

@ -186,51 +186,6 @@ static inline void load_context(const void* addr)
); );
} }
#elif CONFIG_CPU == TCC730
/*---------------------------------------------------------------------------
* Store non-volatile context.
*---------------------------------------------------------------------------
*/
#define store_context(addr) \
__asm__ volatile ( \
"push r0,r1\n\t" \
"push r2,r3\n\t" \
"push r4,r5\n\t" \
"push r6,r7\n\t" \
"push a8,a9\n\t" \
"push a10,a11\n\t" \
"push a12,a13\n\t" \
"push a14\n\t" \
"ldw @[%0+0], a15\n\t" : : "a" (addr) );
/*---------------------------------------------------------------------------
* Load non-volatile context.
*---------------------------------------------------------------------------
*/
#define load_context(addr) \
{ \
if (!(addr)->started) { \
(addr)->started = 1; \
__asm__ volatile ( \
"ldw a15, @[%0+0]\n\t" \
"ldw a14, @[%0+4]\n\t" \
"jmp a14\n\t" : : "a" (addr) \
); \
} else \
__asm__ volatile ( \
"ldw a15, @[%0+0]\n\t" \
"pop a14\n\t" \
"pop a13,a12\n\t" \
"pop a11,a10\n\t" \
"pop a9,a8\n\t" \
"pop r7,r6\n\t" \
"pop r5,r4\n\t" \
"pop r3,r2\n\t" \
"pop r1,r0\n\t" : : "a" (addr) \
); \
\
}
#endif #endif
static void add_to_list(struct thread_entry **list, static void add_to_list(struct thread_entry **list,
@ -353,13 +308,6 @@ static inline void sleep_core(void)
/* This should sleep the CPU. It appears to wake by itself on /* This should sleep the CPU. It appears to wake by itself on
interrupts */ interrupts */
CPU_CTL = 0x80000000; CPU_CTL = 0x80000000;
#elif CONFIG_CPU == TCC730
/* Sleep mode is triggered by the SYS instr on CalmRisc16.
* Unfortunately, the manual doesn't specify which arg to use.
__asm__ volatile ("sys #0x0f");
0x1f seems to trigger a reset;
0x0f is the only one other argument used by Archos.
*/
#elif CONFIG_CPU == S3C2440 #elif CONFIG_CPU == S3C2440
CLKCON |= 2; CLKCON |= 2;
#endif #endif
@ -430,12 +378,10 @@ void switch_thread(bool save_context, struct thread_entry **blocked_list)
{ {
store_context(&cores[CURRENT_CORE].running->context); store_context(&cores[CURRENT_CORE].running->context);
# if CONFIG_CPU != TCC730
/* Check if the current thread stack is overflown */ /* Check if the current thread stack is overflown */
stackptr = cores[CURRENT_CORE].running->stack; stackptr = cores[CURRENT_CORE].running->stack;
if(stackptr[0] != DEADBEEF) if(stackptr[0] != DEADBEEF)
panicf("Stkov %s", cores[CURRENT_CORE].running->name); panicf("Stkov %s", cores[CURRENT_CORE].running->name);
# endif
/* Check if a thread state change has been requested. */ /* Check if a thread state change has been requested. */
if (cores[CURRENT_CORE].running->statearg) if (cores[CURRENT_CORE].running->statearg)
@ -644,14 +590,8 @@ struct thread_entry*
add_to_list(&cores[core].running, thread); add_to_list(&cores[core].running, thread);
regs = &thread->context; regs = &thread->context;
#if defined(CPU_COLDFIRE) || (CONFIG_CPU == SH7034) || defined(CPU_ARM)
/* Align stack to an even 32 bit boundary */ /* Align stack to an even 32 bit boundary */
regs->sp = (void*)(((unsigned int)stack + stack_size) & ~3); regs->sp = (void*)(((unsigned int)stack + stack_size) & ~3);
#elif CONFIG_CPU == TCC730
/* Align stack on word boundary */
regs->sp = (void*)(((unsigned long)stack + stack_size - 2) & ~1);
regs->started = 0;
#endif
regs->start = (void*)function; regs->start = (void*)function;
return thread; return thread;
@ -751,11 +691,7 @@ void init_threads(void)
cores[COP].threads[0].stack_size = (int)cop_stackend - (int)cop_stackbegin; cores[COP].threads[0].stack_size = (int)cop_stackend - (int)cop_stackbegin;
#endif #endif
} }
#if CONFIG_CPU == TCC730
cores[core].threads[0].context.started = 1;
#else
cores[core].threads[0].context.start = 0; /* thread 0 already running */ cores[core].threads[0].context.start = 0; /* thread 0 already running */
#endif
} }
int thread_stack_usage(const struct thread_entry *thread) int thread_stack_usage(const struct thread_entry *thread)

39
firmware/usb.c
View file

@ -131,30 +131,6 @@ void usb_enable(bool on)
or_b(0x08, &PADRL); /* deassert card detect */ or_b(0x08, &PADRL); /* deassert card detect */
} }
or_b(0x28, &PAIORL); /* output for USB enable and card detect */ or_b(0x28, &PAIORL); /* output for USB enable and card detect */
#elif defined(USB_GMINISTYLE)
{
int smsc_ver = smsc_version();
if (on) {
if (smsc_ver < 4) {
P6 &= ~0x04;
P10 &= ~0x20;
smsc_delay();
P6 |= 0x08;
P10 |= 0x20;
smsc_delay();
}
P6 |= 0x10;
} else {
P6 &= ~0x10;
if (smsc_ver < 4) {
P6 &= ~0x04;
P10 &= ~0x20;
}
}
}
#elif defined(USB_ISP1582) #elif defined(USB_ISP1582)
/* TODO: Implement USB_ISP1582 */ /* TODO: Implement USB_ISP1582 */
(void) on; (void) on;
@ -371,9 +347,6 @@ bool usb_detect(void)
#ifdef USB_PLAYERSTYLE #ifdef USB_PLAYERSTYLE
current_status = (PADR & 0x8000)?false:true; current_status = (PADR & 0x8000)?false:true;
#endif #endif
#ifdef USB_GMINISTYLE
current_status = (P5 & 0x10)?true:false;
#endif
#ifdef USB_IPODSTYLE #ifdef USB_IPODSTYLE
/* The following check is in the ipodlinux source, with the /* The following check is in the ipodlinux source, with the
comment "USB2D_IDENT is bad" if USB2D_IDENT != 0x22FA05 */ comment "USB2D_IDENT is bad" if USB2D_IDENT != 0x22FA05 */
@ -395,18 +368,6 @@ static void usb_tick(void)
{ {
bool current_status; bool current_status;
#ifdef USB_GMINISTYLE
/* Keep usb chip in usb state (?) */
if (P5 & 0x10) {
if ((P10 & 0x20) == 0 || (P6 & 0x08) == 0) {
if (smsc_version() < 4) {
P6 |= 0x08;
P10 |= 0x20;
}
}
}
#endif
if(usb_monitor_enabled) if(usb_monitor_enabled)
{ {
current_status = usb_detect(); current_status = usb_detect();

6
tools/bmp2rb.c
View file

@ -290,7 +290,7 @@ int transform_bitmap(const struct RGBQUAD *src, int width, int height,
switch (format) switch (format)
{ {
case 0: /* Archos recorders, Ondio, Gmini 120/SP, Iriver H1x0 monochrome */ case 0: /* Archos recorders, Ondio, Iriver H1x0 monochrome */
dst_w = width; dst_w = width;
dst_h = (height + 7) / 8; dst_h = (height + 7) / 8;
dst_d = 8; dst_d = 8;
@ -351,7 +351,7 @@ int transform_bitmap(const struct RGBQUAD *src, int width, int height,
switch (format) switch (format)
{ {
case 0: /* Archos recorders, Ondio, Gmini 120/SP, Iriver H1x0 b&w */ case 0: /* Archos recorders, Ondio, Iriver H1x0 b&w */
for (row = 0; row < height; row++) for (row = 0; row < height; row++)
for (col = 0; col < width; col++) for (col = 0; col < width; col++)
{ {
@ -528,7 +528,7 @@ void print_usage(void)
"\t-h <dir> Create header file in <dir>/<id>.h\n" "\t-h <dir> Create header file in <dir>/<id>.h\n"
"\t-a Show ascii picture of bitmap\n" "\t-a Show ascii picture of bitmap\n"
"\t-f <n> Generate destination format n, default = 0\n" "\t-f <n> Generate destination format n, default = 0\n"
"\t 0 Archos recorder, Ondio, Gmini 120/SP, Iriver H1x0 mono\n" "\t 0 Archos recorder, Ondio, Iriver H1x0 mono\n"
"\t 1 Archos player graphics library\n" "\t 1 Archos player graphics library\n"
"\t 2 Iriver H1x0 4-grey\n" "\t 2 Iriver H1x0 4-grey\n"
"\t 3 Canonical 8-bit greyscale\n" "\t 3 Canonical 8-bit greyscale\n"

3
tools/buildzip.pl
View file

@ -289,9 +289,6 @@ if(!$exe) {
elsif($target =~ /iriver/i) { elsif($target =~ /iriver/i) {
$exe = "rockbox.iriver"; $exe = "rockbox.iriver";
} }
elsif($target =~ /gmini/i) {
$exe = "rockbox.gmini";
}
else { else {
$exe = "archos.mod"; $exe = "archos.mod";
} }

75
tools/configure vendored
View file

@ -242,28 +242,6 @@ arm9tdmicc () {
endian="little" endian="little"
} }
whichaddr () {
case $archos in
gmini120|gminisp)
echo ""
echo "Where do you want the firmware to be flashed?"
echo "WARNING: Do not answer this question lightly,"
echo "unless you don't plan to flash your gmini."
echo "In this case, reply '0x10000' (no quotes) and "
echo "re-configure when you know better."
loadaddress=`input`
if [ "0$loadaddress" = "0" ]; then
#default
loadaddress="0x10000";
fi
echo "You selected $loadaddress"
;;
*)
;;
esac
}
whichdevel () { whichdevel () {
################################################################## ##################################################################
# Prompt for specific developer options # Prompt for specific developer options
@ -595,10 +573,9 @@ cat <<EOF
1) Recorder 11) H320/H340 21) Nano 1) Recorder 11) H320/H340 21) Nano
2) FM Recorder 12) iHP-100/110/115 22) Video 2) FM Recorder 12) iHP-100/110/115 22) Video
3) Recorder v2 13) iFP-790 23) 3G 3) Recorder v2 13) iFP-790 23) 3G
4) Gmini 120 14) H10 20Gb 24) 4G Grayscale 4) Ondio SP 14) H10 20Gb 24) 4G Grayscale
5) Gmini SP 15) H10 5/6Gb 25) Mini 1G 5) Ondio FM 15) H10 5/6Gb 25) Mini 1G
6) Ondio SP 26) Mini 2G 26) Mini 2G
7) Ondio FM
==iAudio== ==Toshiba== ==SanDisk== ==iAudio== ==Toshiba== ==SanDisk==
30) X5/X5V/X5L 40) Gigabeat F 50) Sansa e200 30) X5/X5V/X5L 40) Gigabeat F 50) Sansa e200
@ -737,47 +714,7 @@ EOF
toolset=$archosbitmaptools toolset=$archosbitmaptools
;; ;;
4|gmini120) 4|ondiosp)
target_id=5
archos="gmini120"
target="-DARCHOS_GMINI120"
memory=16 # fixed size (16 is a guess, remove comment when checked)
calmrisccc
tool="cp" # might work for now!
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
bmp2rb_native="$rootdir/tools/bmp2rb -f 0"
output="rockbox.gmini"
appextra="recorder:gui"
archosrom=""
flash=""
plugins="" # disabled for now, enable later on
codecs="libmad"
# toolset is the tools within the tools directory that we build for
# this particular target.
toolset="$toolset bmp2rb codepages"
;;
5|gminisp)
target_id=6
archos="gminisp"
target="-DARCHOS_GMINISP"
memory=16 # fixed size (16 is a guess, remove comment when checked)
calmrisccc
tool="cp" # might work for now!
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
bmp2rb_native="$rootdir/tools/bmp2rb -f 0"
output="rockbox.gmini"
appextra="recorder:gui"
archosrom=""
flash=""
plugins="" # disabled for now, enable later on
codecs="libmad"
# toolset is the tools within the tools directory that we build for
# this particular target.
toolset="$toolset bmp2rb codepages"
;;
6|ondiosp)
target_id=7 target_id=7
archos="ondiosp" archos="ondiosp"
target="-DARCHOS_ONDIOSP" target="-DARCHOS_ONDIOSP"
@ -796,7 +733,7 @@ EOF
toolset=$archosbitmaptools toolset=$archosbitmaptools
;; ;;
7|ondiofm) 5|ondiofm)
target_id=8 target_id=8
archos="ondiofm" archos="ondiofm"
target="-DARCHOS_ONDIOFM" target="-DARCHOS_ONDIOFM"
@ -1387,8 +1324,6 @@ if [ -z "$debug" ]; then
GCCOPTS="$GCCOPTS $GCCOPTIMIZE" GCCOPTS="$GCCOPTS $GCCOPTIMIZE"
fi fi
whichaddr
echo "Using source code root directory: $rootdir" echo "Using source code root directory: $rootdir"
# this was once possible to change at build-time, but no more: # this was once possible to change at build-time, but no more:

BIN
uisimulator/sdl/UI-gmini120.bmp
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Width:  |  Height:  |  Size: 191 KiB

35
uisimulator/sdl/button.c
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@ -124,41 +124,6 @@ void button_event(int key, bool pressed)
new_btn = BUTTON_MENU; new_btn = BUTTON_MENU;
break; break;
#elif CONFIG_KEYPAD == GMINI100_PAD
case SDLK_KP4:
case SDLK_LEFT:
new_btn = BUTTON_LEFT;
break;
case SDLK_KP6:
case SDLK_RIGHT:
new_btn = BUTTON_RIGHT;
break;
case SDLK_KP8:
case SDLK_UP:
new_btn = BUTTON_UP;
break;
case SDLK_KP2:
case SDLK_DOWN:
new_btn = BUTTON_DOWN;
break;
case SDLK_KP_PLUS:
case SDLK_F8:
new_btn = BUTTON_ON;
break;
case SDLK_KP_ENTER:
case SDLK_RETURN:
case SDLK_a:
new_btn = BUTTON_OFF;
break;
case SDLK_KP5:
case SDLK_SPACE:
new_btn = BUTTON_PLAY;
break;
case SDLK_KP_PERIOD:
case SDLK_INSERT:
new_btn = BUTTON_MENU;
break;
#elif CONFIG_KEYPAD == IAUDIO_X5_PAD #elif CONFIG_KEYPAD == IAUDIO_X5_PAD
case SDLK_KP4: case SDLK_KP4:
case SDLK_LEFT: case SDLK_LEFT:

12
uisimulator/sdl/uisdl.h
View file

@ -173,18 +173,6 @@
#define UI_LCD_WIDTH 320 #define UI_LCD_WIDTH 320
#define UI_LCD_HEIGHT 240 #define UI_LCD_HEIGHT 240
#elif defined(ARCHOS_GMINI120)
#define UI_TITLE "Gmini 120"
#define UI_WIDTH 370 /* width of GUI window */
#define UI_HEIGHT 264 /* height of GUI window */
#define UI_LCD_BGCOLOR 90, 145, 90 /* bkgnd color of LCD (no backlight) */
#define UI_LCD_BGCOLORLIGHT 60, 160, 230 /* bkgnd color of LCD (backlight) */
#define UI_LCD_BLACK 0, 0, 0 /* black */
#define UI_LCD_POSX 85 /* x position of lcd */
#define UI_LCD_POSY 61 /* y position of lcd (74 for real aspect) */
#define UI_LCD_WIDTH 192 /* * 1.5 */
#define UI_LCD_HEIGHT 96 /* * 1.5 */
#elif defined(IAUDIO_X5) #elif defined(IAUDIO_X5)
#define UI_TITLE "iAudio X5" #define UI_TITLE "iAudio X5"
#define UI_WIDTH 300 /* width of GUI window */ #define UI_WIDTH 300 /* width of GUI window */