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set/clear port bits with atomic instructions instead of read-modify-write, saves time+space, allows port usage in ISR

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@4022 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jörg Hohensohn 2003-11-06 01:34:50 +00:00
parent 9e95757928
commit 75bab49a54
8 changed files with 88 additions and 67 deletions
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9
firmware/backlight.c
View file

@ -26,6 +26,7 @@
#include "rtc.h" #include "rtc.h"
#include "usb.h" #include "usb.h"
#include "power.h" #include "power.h"
#include "system.h"
#define BACKLIGHT_ON 1 #define BACKLIGHT_ON 1
#define BACKLIGHT_OFF 2 #define BACKLIGHT_OFF 2
@ -73,7 +74,7 @@ void backlight_thread(void)
/* Disable square wave */ /* Disable square wave */
rtc_write(0x0a, rtc_read(0x0a) & ~0x40); rtc_write(0x0a, rtc_read(0x0a) & ~0x40);
#else #else
PADR |= 0x4000; __set_bit_constant(14-8, &PADRH);
#endif #endif
} }
/* else if(backlight_timer) */ /* else if(backlight_timer) */
@ -83,7 +84,7 @@ void backlight_thread(void)
/* Enable square wave */ /* Enable square wave */
rtc_write(0x0a, rtc_read(0x0a) | 0x40); rtc_write(0x0a, rtc_read(0x0a) | 0x40);
#else #else
PADR &= ~0x4000; __clear_bit_constant(14-8, &PADRH);
#endif #endif
} }
break; break;
@ -93,7 +94,7 @@ void backlight_thread(void)
/* Disable square wave */ /* Disable square wave */
rtc_write(0x0a, rtc_read(0x0a) & ~0x40); rtc_write(0x0a, rtc_read(0x0a) & ~0x40);
#else #else
PADR |= 0x4000; __set_bit_constant(14-8, &PADRH);
#endif #endif
break; break;
@ -171,7 +172,7 @@ void backlight_init(void)
create_thread(backlight_thread, backlight_stack, create_thread(backlight_thread, backlight_stack,
sizeof(backlight_stack), backlight_thread_name); sizeof(backlight_stack), backlight_thread_name);
PAIOR |= 0x4000; __set_bit_constant(14-8, &PAIORH);
backlight_on(); backlight_on();
} }

14
firmware/drivers/ata.c
View file

@ -607,11 +607,11 @@ int ata_hard_reset(void)
int ret; int ret;
/* state HRR0 */ /* state HRR0 */
PADR &= ~0x0200; /* assert _RESET */ __clear_bit_constant(9-8, &PADRH); /* assert _RESET */
sleep(1); /* > 25us */ sleep(1); /* > 25us */
/* state HRR1 */ /* state HRR1 */
PADR |= 0x0200; /* negate _RESET */ __set_bit_constant(9-8, &PADRH); /* negate _RESET */
sleep(1); /* > 2ms */ sleep(1); /* > 2ms */
/* state HRR2 */ /* state HRR2 */
@ -718,11 +718,11 @@ static int io_address_detect(void)
void ata_enable(bool on) void ata_enable(bool on)
{ {
if(on) if(on)
PADR &= ~0x80; /* enable ATA */ __clear_bit_constant(7, &PADRL); /* enable ATA */
else else
PADR |= 0x80; /* disable ATA */ __set_bit_constant(7, &PADRL); /* disable ATA */
PAIOR |= 0x80; __set_bit_constant(7, &PAIORL);
} }
static int identify(void) static int identify(void)
@ -787,8 +787,8 @@ int ata_init(void)
led(false); led(false);
/* Port A setup */ /* Port A setup */
PAIOR |= 0x0200; /* output for ATA reset */ __set_bit_constant(9-8, &PAIORH); /* output for ATA reset */
PADR |= 0x0200; /* release ATA reset */ __set_bit_constant(9-8, &PADRH); /* release ATA reset */
PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */ PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
sleeping = false; sleeping = false;

15
firmware/drivers/fmradio.c
View file

@ -21,6 +21,7 @@
#include "kernel.h" #include "kernel.h"
#include "thread.h" #include "thread.h"
#include "debug.h" #include "debug.h"
#include "system.h"
#ifdef HAVE_FMRADIO #ifdef HAVE_FMRADIO
@ -37,15 +38,15 @@
#define PB4 0x0010 #define PB4 0x0010
/* cute little functions */ /* cute little functions */
#define CE_LO (PBDR &= ~PB3) #define CE_LO __clear_bit_constant(3, PBDRL_ADDR)
#define CE_HI (PBDR |= PB3) #define CE_HI __set_bit_constant(3, PBDRL_ADDR)
#define CL_LO (PBDR &= ~PB1) #define CL_LO __clear_bit_constant(1, PBDRL_ADDR)
#define CL_HI (PBDR |= PB1) #define CL_HI __set_bit_constant(1, PBDRL_ADDR)
#define DO (PBDR & PB4) #define DO (PBDR & PB4)
#define DI_LO (PBDR &= ~PB0) #define DI_LO __clear_bit_constant(0, PBDRL_ADDR)
#define DI_HI (PBDR |= PB0) #define DI_HI __set_bit_constant(0, PBDRL_ADDR)
#define START (PBDR |= (PB3 | PB1)) #define START __set_mask_constant((PB3 | PB1), PBDRL_ADDR)
/* delay loop */ /* delay loop */
#define DELAY do { int _x; for(_x=0;_x<10;_x++);} while (0) #define DELAY do { int _x; for(_x=0;_x<10;_x++);} while (0)

35
firmware/drivers/i2c.c
View file

@ -21,22 +21,23 @@
#include "kernel.h" #include "kernel.h"
#include "thread.h" #include "thread.h"
#include "debug.h" #include "debug.h"
#include "system.h"
#define PB13 0x2000 #define PB13 0x2000
#define PB7 0x0080 #define PB7 0x0080
#define PB5 0x0020 #define PB5 0x0020
/* cute little functions */ /* cute little functions, atomic read-modify-write */
#define SDA_LO (PBDR &= ~PB7) #define SDA_LO __clear_bit_constant(7, &PBDRL)
#define SDA_HI (PBDR |= PB7) #define SDA_HI __set_bit_constant(7, &PBDRL)
#define SDA_INPUT (PBIOR &= ~PB7) #define SDA_INPUT __clear_bit_constant(7, &PBIORL)
#define SDA_OUTPUT (PBIOR |= PB7) #define SDA_OUTPUT __set_bit_constant(7, &PBIORL)
#define SDA (PBDR & PB7) #define SDA (PBDR & PB7)
#define SCL_INPUT (PBIOR &= ~PB13) #define SCL_INPUT __clear_bit_constant(13-8, &PBIORH)
#define SCL_OUTPUT (PBIOR |= PB13) #define SCL_OUTPUT __set_bit_constant(13-8, &PBIORH)
#define SCL_LO (PBDR &= ~PB13) #define SCL_LO __clear_bit_constant(13-8, &PBDRH)
#define SCL_HI (PBDR |= PB13) #define SCL_HI __set_bit_constant(13-8, &PBDRH)
#define SCL (PBDR & PB13) #define SCL (PBDR & PB13)
/* arbitrary delay loop */ /* arbitrary delay loop */
@ -81,11 +82,11 @@ void i2c_init(void)
PBCR2 &= ~0xcc00; /* PB5 abd PB7 */ PBCR2 &= ~0xcc00; /* PB5 abd PB7 */
/* PB5 is "MAS enable". make it output and high */ /* PB5 is "MAS enable". make it output and high */
PBIOR |= PB5; __set_bit_constant(5, &PBIORL);
PBDR |= PB5; __set_bit_constant(5, &PBDRL);
/* Set the clock line to an output */ /* Set the clock line PB13 to an output */
PBIOR |= PB13; __set_bit_constant(13-8, &PBIORH);
SDA_OUTPUT; SDA_OUTPUT;
SDA_HI; SDA_HI;
@ -103,9 +104,13 @@ void i2c_ack(int bit)
SCL_LO; /* Set the clock low */ SCL_LO; /* Set the clock low */
if ( bit ) if ( bit )
{
SDA_HI; SDA_HI;
}
else else
{
SDA_LO; SDA_LO;
}
SCL_INPUT; /* Set the clock to input */ SCL_INPUT; /* Set the clock to input */
while(!SCL) /* and wait for the MAS to release it */ while(!SCL) /* and wait for the MAS to release it */
@ -153,9 +158,13 @@ void i2c_outb(unsigned char byte)
/* clock out each bit, MSB first */ /* clock out each bit, MSB first */
for ( i=0x80; i; i>>=1 ) { for ( i=0x80; i; i>>=1 ) {
if ( i & byte ) if ( i & byte )
{
SDA_HI; SDA_HI;
}
else else
{
SDA_LO; SDA_LO;
}
SCL_HI; SCL_HI;
SCL_LO; SCL_LO;
} }

9
firmware/drivers/led.c
View file

@ -20,6 +20,7 @@
#include <stdbool.h> #include <stdbool.h>
#include "sh7034.h" #include "sh7034.h"
#include "led.h" #include "led.h"
#include "system.h"
void led(bool on) void led(bool on)
{ {
@ -30,8 +31,12 @@ void led(bool on)
asm("and.b" "\t" "%0,@(r0,gbr)" : : "I"(~0x40), "z"(PBDR_ADDR+1)); asm("and.b" "\t" "%0,@(r0,gbr)" : : "I"(~0x40), "z"(PBDR_ADDR+1));
#else #else
if ( on ) if ( on )
PBDR |= 0x40; {
__set_bit_constant(6, &PBDRL);
}
else else
PBDR &= ~0x40; {
__clear_bit_constant(6, &PBDRL);
}
#endif #endif
} }

11
firmware/drivers/mas.c
View file

@ -23,6 +23,7 @@
#include "debug.h" #include "debug.h"
#include "mas.h" #include "mas.h"
#include "kernel.h" #include "kernel.h"
#include "system.h"
extern bool old_recorder; extern bool old_recorder;
@ -268,21 +269,21 @@ static int mas_devread(unsigned long *dest, int len)
#ifdef HAVE_MAS3587F #ifdef HAVE_MAS3587F
void mas_reset(void) void mas_reset(void)
{ {
PAIOR |= 0x100; __set_bit_constant(8-8, &PAIORH);
if(old_recorder) if(old_recorder)
{ {
/* Older recorder models don't invert the POR signal */ /* Older recorder models don't invert the POR signal */
PADR |= 0x100; __set_bit_constant(8-8, &PADRH);
sleep(HZ/100); sleep(HZ/100);
PADR &= ~0x100; __clear_bit_constant(8-8, &PADRH);
sleep(HZ/5); sleep(HZ/5);
} }
else else
{ {
PADR &= ~0x100; __clear_bit_constant(8-8, &PADRH);
sleep(HZ/100); sleep(HZ/100);
PADR |= 0x100; __set_bit_constant(8-8, &PADRH);
sleep(HZ/5); sleep(HZ/5);
} }
} }

32
firmware/drivers/power.c
View file

@ -21,6 +21,7 @@
#include "config.h" #include "config.h"
#include "adc.h" #include "adc.h"
#include "kernel.h" #include "kernel.h"
#include "system.h"
#include "power.h" #include "power.h"
#ifdef HAVE_CHARGE_CTRL #ifdef HAVE_CHARGE_CTRL
@ -32,11 +33,11 @@ bool charger_enabled;
void power_init(void) void power_init(void)
{ {
#ifdef HAVE_CHARGE_CTRL #ifdef HAVE_CHARGE_CTRL
PBIOR |= 0x20; /* Set charging control bit to output */ __set_bit_constant(5, &PBIORL); /* Set charging control bit to output */
charger_enable(false); /* Default to charger OFF */ charger_enable(false); /* Default to charger OFF */
#endif #endif
#ifdef HAVE_ATA_POWER_OFF #ifdef HAVE_ATA_POWER_OFF
PAIOR |= 0x20; __set_bit_constant(5, &PAIORL);
PACR2 &= 0xFBFF; PACR2 &= 0xFBFF;
#endif #endif
} }
@ -60,11 +61,14 @@ bool charger_inserted(void)
void charger_enable(bool on) void charger_enable(bool on)
{ {
#ifdef HAVE_CHARGE_CTRL #ifdef HAVE_CHARGE_CTRL
if(on) { if(on)
PBDR &= ~0x20; {
__clear_bit_constant(5, &PBDRL);
charger_enabled = 1; charger_enabled = 1;
} else { }
PBDR |= 0x20; else
{
__set_bit_constant(5, &PBDRL);
charger_enabled = 0; charger_enabled = 0;
} }
#else #else
@ -76,9 +80,9 @@ void ide_power_enable(bool on)
{ {
#ifdef HAVE_ATA_POWER_OFF #ifdef HAVE_ATA_POWER_OFF
if(on) if(on)
PADR |= 0x20; __set_bit_constant(5, &PADRL);
else else
PADR &= ~0x20; __clear_bit_constant(5, &PADRL);
#else #else
on = on; on = on;
#endif #endif
@ -88,14 +92,14 @@ void power_off(void)
{ {
set_irq_level(15); set_irq_level(15);
#ifdef HAVE_POWEROFF_ON_PBDR #ifdef HAVE_POWEROFF_ON_PBDR
PBDR &= ~PBDR_BTN_OFF; __clear_mask_constant(PBDR_BTN_OFF, &PBDRL);
PBIOR |= PBDR_BTN_OFF; __set_mask_constant(PBDR_BTN_OFF, &PBIORL);
#elif defined(HAVE_POWEROFF_ON_PB5) #elif defined(HAVE_POWEROFF_ON_PB5)
PBDR &= ~0x20; __clear_bit_constant(5, &PBDRL);
PBIOR |= 0x20; __set_bit_constant(5, &PBIORL);
#else #else
PADR &= ~0x800; __clear_bit_constant(11-8, &PADRH);
PAIOR |= 0x800; __set_bit_constant(11-8, &PAIORH);
#endif #endif
while(1); while(1);
} }

28
firmware/mpeg.c
View file

@ -740,7 +740,7 @@ void drain_dma_buffer(void)
{ {
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)) while((*((volatile unsigned char *)PBDR_ADDR) & 0x40))
{ {
PADR |= 0x800; __set_bit_constant(11-8, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@ -748,7 +748,7 @@ void drain_dma_buffer(void)
the data is read */ the data is read */
asm(" nop\n nop\n nop\n"); asm(" nop\n nop\n nop\n");
asm(" nop\n nop\n nop\n"); asm(" nop\n nop\n nop\n");
PADR &= ~0x800; __clear_bit_constant(11-8, &PADRH);
while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80)); while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80));
} }
@ -757,7 +757,7 @@ void drain_dma_buffer(void)
{ {
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)) while((*((volatile unsigned char *)PBDR_ADDR) & 0x40))
{ {
PADR &= ~0x800; __clear_bit_constant(11-8, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@ -766,7 +766,7 @@ void drain_dma_buffer(void)
asm(" nop\n nop\n nop\n"); asm(" nop\n nop\n nop\n");
asm(" nop\n nop\n nop\n"); asm(" nop\n nop\n nop\n");
PADR |= 0x800; __set_bit_constant(11-8, &PADRH);
while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80)); while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80));
} }
@ -814,7 +814,7 @@ static void dma_tick(void)
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40) while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)
&& i < 30) && i < 30)
{ {
PADR |= 0x800; __set_bit_constant(11-8, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@ -828,7 +828,7 @@ static void dma_tick(void)
i++; i++;
PADR &= ~0x800; __clear_bit_constant(11-8, &PADRH);
/* No wait for /RTW, cause it's not necessary */ /* No wait for /RTW, cause it's not necessary */
} }
@ -839,7 +839,7 @@ static void dma_tick(void)
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40) while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)
&& i < 30) && i < 30)
{ {
PADR &= ~0x800; __clear_bit_constant(11-8, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@ -853,7 +853,7 @@ static void dma_tick(void)
i++; i++;
PADR |= 0x800; __set_bit_constant(11-8, &PADRH);
/* No wait for /RTW, cause it's not necessary */ /* No wait for /RTW, cause it's not necessary */
} }
@ -2169,7 +2169,7 @@ static void setup_sci0(void)
PBCR1 = (PBCR1 & 0x0cff) | 0x1208; PBCR1 = (PBCR1 & 0x0cff) | 0x1208;
/* Set PB12 to output */ /* Set PB12 to output */
PBIOR |= 0x1000; __set_bit_constant(12-8, &PBIORH);
/* Disable serial port */ /* Disable serial port */
SCR0 = 0x00; SCR0 = 0x00;
@ -2190,8 +2190,8 @@ static void setup_sci0(void)
IPRD &= 0x0ff0; IPRD &= 0x0ff0;
/* set PB15 and PB14 to inputs */ /* set PB15 and PB14 to inputs */
PBIOR &= 0x7fff; __clear_bit_constant(15-8, &PBIORH);
PBIOR &= 0xbfff; __clear_bit_constant(14-8, &PBIORH);
/* Enable End of DMA interrupt at prio 8 */ /* Enable End of DMA interrupt at prio 8 */
IPRC = (IPRC & 0xf0ff) | 0x0800; IPRC = (IPRC & 0xf0ff) | 0x0800;
@ -3144,7 +3144,7 @@ void mpeg_init(int volume, int bass, int treble, int balance, int loudness,
setup_sci0(); setup_sci0();
#ifdef HAVE_MAS3587F #ifdef HAVE_MAS3587F
PAIOR |= 0x0800; /* output for /PR */ __set_bit_constant(11-8, &PAIORH); /* output for /PR */
init_playback(); init_playback();
mas_version_code = mas_readver(); mas_version_code = mas_readver();
@ -3157,9 +3157,9 @@ void mpeg_init(int volume, int bass, int treble, int balance, int loudness,
#endif #endif
#ifdef HAVE_MAS3507D #ifdef HAVE_MAS3507D
PBDR &= ~0x20; __clear_bit_constant(5, &PBDRL);
sleep(HZ/5); sleep(HZ/5);
PBDR |= 0x20; __set_bit_constant(5, &PBDRL);
sleep(HZ/5); sleep(HZ/5);
/* set IRQ6 to edge detect */ /* set IRQ6 to edge detect */