forked from len0rd/rockbox
Added DMA register definitions
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6202 a1c6a512-1295-4272-9138-f99709370657
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@ -226,4 +226,41 @@
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#define DEVICE_ID (*(volatile unsigned long *)(MBAR2 + 0x0ac))
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#define DEVICE_ID (*(volatile unsigned long *)(MBAR2 + 0x0ac))
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/* DMA Registers ... */
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#define O_SAR 0x00 /* Source Address */
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#define O_DAR 0x04 /* Destination Address */
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#define O_DCR 0x08 /* DMA Control Register */
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#define O_BCR 0x0C /* 16 or 24 bits depending on BCR24BIT */
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#define O_DSR 0x10 /* DMA Status Register */
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#define O_IVR 0x14 /* Interrupt Vector Register */
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/* DMA Control Register bits */
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#define DMA_INT (1 << 31) /* Enable Interrupts */
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#define DMA_EEXT (1 << 30) /* Enable peripherial request */
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#define DMA_CS (1 << 29) /* Cycle Steal */
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#define DMA_AA (1 << 28) /* Auto-Align */
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#define DMA_SINC (1 << 22) /* Source Increment */
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#define DMA_SSIZE(x) (((x)&3) << 20) /* Size of source data */
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#define DMA_DINC (1 << 19) /* Destination Increment */
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#define DMA_DSIZE(x) (((x)&3) << 17) /* Size of destination data */
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#define DMA_START (1 << 16) /* Start DMA transfer */
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#define DMA_SIZE_DWORD 0 /* 4 bytes */
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#define DMA_SIZE_BYTE 1 /* 1 byte */
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#define DMA_SIZE_WORD 2 /* 2 bytes */
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#define DMA_SIZE_LINE 3 /* 16 bytes */
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/* DMA Status Register bits */
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#define DMA_CE (1 << 6) /* Configuration Error */
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#define DMA_BES (1 << 5) /* Bus error on source */
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#define DMA_BED (1 << 4) /* Bus error on destination */
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#define DMA_REQ (1 << 2) /* Request pending */
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#define DMA_BSY (1 << 1) /* DMA channel busy */
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#define DMA_DONE (1 << 0) /* Transfer has completed */
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/* DMAROUTE config */
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#define DMA0_REQ_AUDIO_1 0x80
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#define DMA0_REQ_AUDIO_2 0x81
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#endif
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#endif
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