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imx233: rewrite ocotp using new register headers

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Change-Id: I3c622119a1e296ec6b3f35f27e81b5118ab7f6cc
This commit is contained in:
Amaury Pouly 2013-06-16 16:46:12 +02:00
parent d815cf3c79
commit 6f0eaf4827
3 changed files with 22 additions and 43 deletions
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26
firmware/target/arm/imx233/debug-imx233.c
View file

@ -557,20 +557,20 @@ struct
} dbg_ocotp[] = } dbg_ocotp[] =
{ {
#define E(n,v) { .name = n, .addr = &v } #define E(n,v) { .name = n, .addr = &v }
E("CUST0", HW_OCOTP_CUSTx(0)), E("CUST1", HW_OCOTP_CUSTx(1)), E("CUST0", HW_OCOTP_CUSTn(0)), E("CUST1", HW_OCOTP_CUSTn(1)),
E("CUST2", HW_OCOTP_CUSTx(2)), E("CUST0", HW_OCOTP_CUSTx(3)), E("CUST2", HW_OCOTP_CUSTn(2)), E("CUST0", HW_OCOTP_CUSTn(3)),
E("HWCAP0", HW_OCOTP_HWCAPx(0)), E("HWCAP1", HW_OCOTP_HWCAPx(1)), E("HWCAP0", HW_OCOTP_HWCAPn(0)), E("HWCAP1", HW_OCOTP_HWCAPn(1)),
E("HWCAP2", HW_OCOTP_HWCAPx(2)), E("HWCAP3", HW_OCOTP_HWCAPx(3)), E("HWCAP2", HW_OCOTP_HWCAPn(2)), E("HWCAP3", HW_OCOTP_HWCAPn(3)),
E("HWCAP4", HW_OCOTP_HWCAPx(4)), E("HWCAP5", HW_OCOTP_HWCAPx(5)), E("HWCAP4", HW_OCOTP_HWCAPn(4)), E("HWCAP5", HW_OCOTP_HWCAPn(5)),
E("SWCAP", HW_OCOTP_SWCAP), E("CUSTCAP", HW_OCOTP_CUSTCAP), E("SWCAP", HW_OCOTP_SWCAP), E("CUSTCAP", HW_OCOTP_CUSTCAP),
E("OPS0", HW_OCOTP_OPSx(0)), E("OPS1", HW_OCOTP_OPSx(1)), E("OPS0", HW_OCOTP_OPSn(0)), E("OPS1", HW_OCOTP_OPSn(1)),
E("OPS2", HW_OCOTP_OPSx(2)), E("OPS2", HW_OCOTP_OPSx(3)), E("OPS2", HW_OCOTP_OPSn(2)), E("OPS2", HW_OCOTP_OPSn(3)),
E("UN0", HW_OCOTP_UNx(0)), E("UN1", HW_OCOTP_UNx(1)), E("UN0", HW_OCOTP_UNn(0)), E("UN1", HW_OCOTP_UNn(1)),
E("UN2", HW_OCOTP_UNx(2)), E("UN2", HW_OCOTP_UNn(2)),
E("ROM0", HW_OCOTP_ROMx(0)), E("ROM1", HW_OCOTP_ROMx(1)), E("ROM0", HW_OCOTP_ROMn(0)), E("ROM1", HW_OCOTP_ROMn(1)),
E("ROM2", HW_OCOTP_ROMx(2)), E("ROM3", HW_OCOTP_ROMx(3)), E("ROM2", HW_OCOTP_ROMn(2)), E("ROM3", HW_OCOTP_ROMn(3)),
E("ROM4", HW_OCOTP_ROMx(4)), E("ROM5", HW_OCOTP_ROMx(5)), E("ROM4", HW_OCOTP_ROMn(4)), E("ROM5", HW_OCOTP_ROMn(5)),
E("ROM6", HW_OCOTP_ROMx(6)), E("ROM7", HW_OCOTP_ROMx(7)), E("ROM6", HW_OCOTP_ROMn(6)), E("ROM7", HW_OCOTP_ROMn(7)),
}; };
bool dbg_hw_info_ocotp(void) bool dbg_hw_info_ocotp(void)

37
firmware/target/arm/imx233/ocotp-imx233.h
View file

@ -24,28 +24,7 @@
#include "config.h" #include "config.h"
#include "system.h" #include "system.h"
#define HW_OCOTP_BASE 0x8002c000 #include "regs/regs-ocotp.h"
#define HW_OCOTP_CTRL (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x0))
#define HW_OCOTP_CTRL__RD_BANK_OPEN (1 << 12)
#define HW_OCOTP_CTRL__ERROR (1 << 9)
#define HW_OCOTP_CTRL__BUSY (1 << 8)
#define HW_OCOTP_CUSTx(x) (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x20 + 0x10 * (x)))
#define HW_OCOTP_CRYPTOx(x) (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x60 + 0x10 * (x)))
#define HW_OCOTP_HWCAPx(x) (*(volatile uint32_t *)(HW_OCOTP_BASE + 0xa0 + 0x10 * (x)))
#define HW_OCOTP_SWCAP (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x100))
#define HW_OCOTP_CUSTCAP (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x110))
#define HW_OCOTP_OPSx(x) (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x130 + 0x10 * (x)))
#define HW_OCOTP_UNx(x) (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x170 + 0x10 * (x)))
#define HW_OCOTP_ROMx(x) (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x1a0 + 0x10 * (x)))
#define IMX233_NUM_OCOTP_CUST 4 #define IMX233_NUM_OCOTP_CUST 4
#define IMX233_NUM_OCOTP_CRYPTO 4 #define IMX233_NUM_OCOTP_CRYPTO 4
@ -54,19 +33,19 @@
#define IMX233_NUM_OCOTP_UN 3 #define IMX233_NUM_OCOTP_UN 3
#define IMX233_NUM_OCOTP_ROM 8 #define IMX233_NUM_OCOTP_ROM 8
static void imx233_ocotp_open_banks(bool open) static inline void imx233_ocotp_open_banks(bool open)
{ {
if(open) if(open)
{ {
__REG_CLR(HW_OCOTP_CTRL) = HW_OCOTP_CTRL__ERROR; BF_CLR(OCOTP_CTRL, ERROR);
__REG_SET(HW_OCOTP_CTRL) = HW_OCOTP_CTRL__RD_BANK_OPEN; BF_SET(OCOTP_CTRL, RD_BANK_OPEN);
while(HW_OCOTP_CTRL & HW_OCOTP_CTRL__BUSY); while(BF_RD(OCOTP_CTRL, BUSY));
} }
else else
__REG_CLR(HW_OCOTP_CTRL) = HW_OCOTP_CTRL__RD_BANK_OPEN; BF_CLR(OCOTP_CTRL, RD_BANK_OPEN);
} }
static uint32_t imx233_ocotp_read(volatile uint32_t *reg) static inline uint32_t imx233_ocotp_read(volatile uint32_t *reg)
{ {
imx233_ocotp_open_banks(true); imx233_ocotp_open_banks(true);
uint32_t val = *reg; uint32_t val = *reg;
@ -74,4 +53,4 @@ static uint32_t imx233_ocotp_read(volatile uint32_t *reg)
return val; return val;
} }
#endif /* OCOTP_IMX233_H */ #endif /* OCOTP_IMX233_H */

2
firmware/usbstack/usb_core.c
View file

@ -338,7 +338,7 @@ static void set_serial_descriptor(void)
{ {
short* p = &usb_string_iSerial.wString[1]; short* p = &usb_string_iSerial.wString[1];
for(int i = 0; i < IMX233_NUM_OCOTP_OPS; i++) { for(int i = 0; i < IMX233_NUM_OCOTP_OPS; i++) {
uint32_t ops = imx233_ocotp_read(&HW_OCOTP_OPSx(i)); uint32_t ops = imx233_ocotp_read(&HW_OCOTP_OPSn(i));
for(int j = 0; j < 8; j++) { for(int j = 0; j < 8; j++) {
*p++ = hex[(ops >> 28) & 0xF]; *p++ = hex[(ops >> 28) & 0xF];
ops <<= 4; ops <<= 4;