forked from len0rd/rockbox
imx233: fix dualboot stubs
They did not compile anymore after the register hearder rework. This change only fixes the syntax, the generated binaries are exactly identical. Change-Id: Iec2347aa3deb1ddfe2ca36f0db1e481c4e2d329c
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parent
420eb66cab
commit
673ee48675
1 changed files with 21 additions and 21 deletions
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@ -18,11 +18,11 @@
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "regs-pinctrl.h"
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#include "regs-power.h"
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#include "regs-lradc.h"
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#include "regs-digctl.h"
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#include "regs-clkctrl.h"
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#include "pinctrl.h"
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#include "power.h"
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#include "lradc.h"
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#include "digctl.h"
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#include "clkctrl.h"
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#define BOOT_ROM_CONTINUE 0 /* continue boot */
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#define BOOT_ROM_SECTION 1 /* switch to new section *result_id */
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@ -76,8 +76,8 @@ static inline void __attribute__((always_inline)) setup_lradc(int src)
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HW_LRADC_CTRL4_CLR = BM_LRADC_CTRL4_LRADCxSELECT(src);
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HW_LRADC_CTRL4_SET = src << BP_LRADC_CTRL4_LRADCxSELECT(src);
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#endif
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HW_LRADC_CHn_CLR(src) = BM_OR2(LRADC_CHn, NUM_SAMPLES, ACCUMULATE);
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BF_SETV(LRADC_CTRL2, DIVIDE_BY_TWO, 1 << src);
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HW_LRADC_CHn_CLR(src) = BM_OR(LRADC_CHn, NUM_SAMPLES, ACCUMULATE);
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BF_WR(LRADC_CTRL2_SET, DIVIDE_BY_TWO(1 << src));
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}
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#define BP_LRADC_CTRL1_LRADCx_IRQ(x) (x)
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@ -86,9 +86,9 @@ static inline void __attribute__((always_inline)) setup_lradc(int src)
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static inline int __attribute__((always_inline)) read_lradc(int src)
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{
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BF_CLR(LRADC_CTRL1, LRADCx_IRQ(src));
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BF_SETV(LRADC_CTRL0, SCHEDULE, 1 << src);
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BF_WR(LRADC_CTRL0_SET, SCHEDULE(1 << src));
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while(!BF_RD(LRADC_CTRL1, LRADCx_IRQ(src)));
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return BF_RDn(LRADC_CHn, src, VALUE);
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return BF_RD(LRADC_CHn(src), VALUE);
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}
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static inline void __attribute__((noreturn)) power_down()
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@ -100,7 +100,7 @@ static inline void __attribute__((noreturn)) power_down()
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HW_PINCTRL_DOUTn(0) = 1 << 9;
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#endif
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/* power down */
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HW_POWER_RESET = BM_OR2(POWER_RESET, UNLOCK, PWD);
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HW_POWER_RESET = BM_OR(POWER_RESET, UNLOCK, PWD);
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while(1);
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}
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@ -244,23 +244,23 @@ static inline void do_charge(void)
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{
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BF_CLR(LRADC_CTRL0, SFTRST);
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BF_CLR(LRADC_CTRL0, CLKGATE);
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BF_WRn(LRADC_DELAYn, 0, TRIGGER_LRADCS, 0x80);
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BF_WRn(LRADC_DELAYn, 0, TRIGGER_DELAYS, 0x1);
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BF_WRn(LRADC_DELAYn, 0, DELAY, 200);
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BF_SETn(LRADC_DELAYn, 0, KICK);
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BF_WR(LRADC_DELAYn(0), TRIGGER_LRADCS(0x80));
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BF_WR(LRADC_DELAYn(0), TRIGGER_DELAYS(0x1));
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BF_WR(LRADC_DELAYn(0), DELAY(200));
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BF_SET(LRADC_DELAYn(0), KICK);
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BF_SET(LRADC_CONVERSION, AUTOMATIC);
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BF_WR_V(LRADC_CONVERSION, SCALE_FACTOR, LI_ION);
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BF_WR(POWER_CHARGE, STOP_ILIMIT, 1);
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BF_WR(POWER_CHARGE, BATTCHRG_I, 0x10);
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BF_WR(LRADC_CONVERSION, SCALE_FACTOR_V(LI_ION));
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BF_WR(POWER_CHARGE, STOP_ILIMIT(1));
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BF_WR(POWER_CHARGE, BATTCHRG_I(0x10));
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BF_CLR(POWER_CHARGE, PWD_BATTCHRG);
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#if IMX233_SUBTARGET >= 3780
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BF_WR(POWER_DCDC4P2, ENABLE_4P2, 1);
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BF_WR(POWER_DCDC4P2, ENABLE_4P2(1));
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BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2);
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BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT, 0x10);
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BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT(0x10));
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#endif
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while(1)
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{
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BF_WR(CLKCTRL_CPU, INTERRUPT_WAIT, 1);
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BF_WR(CLKCTRL_CPU, INTERRUPT_WAIT(1));
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asm volatile (
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"mcr p15, 0, %0, c7, c0, 4 \n" /* Wait for interrupt */
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"nop\n" /* Datasheet unclear: "The lr sent to handler points here after RTI"*/
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@ -290,4 +290,4 @@ int main(uint32_t arg, uint32_t *result_id)
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int __attribute__((section(".start"))) start(uint32_t arg, uint32_t *result_id)
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{
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return main(arg, result_id);
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}
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}
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