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jz47xx: Add support for INIT region

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Change-Id: I100cd661e9b1225167463542800c6aafbc3c17b3
This commit is contained in:
Solomon Peachy 2023-01-04 22:10:48 -05:00
parent fe16ab33dd
commit 641e91aa2f
5 changed files with 41 additions and 8 deletions
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2
firmware/export/config.h
View file

@ -1070,7 +1070,7 @@ Lyre prototype 1 */
#if (defined(CPU_PP) || (CONFIG_CPU == AS3525) || (CONFIG_CPU == AS3525v2) || \
(CONFIG_CPU == IMX31L) || (CONFIG_CPU == IMX233) || \
(CONFIG_CPU == RK27XX) || (CONFIG_CPU == X1000) || defined(CPU_COLDFIRE)) \
(CONFIG_CPU == RK27XX) || defined(CPU_MIPS) || defined(CPU_COLDFIRE)) \
&& (CONFIG_PLATFORM & PLATFORM_NATIVE) && !defined(BOOTLOADER)
/* Functions that have INIT_ATTR attached are NOT guaranteed to survive after
* root_menu() has been called. Their code may be overwritten by other data or

20
firmware/target/mips/ingenic_jz47xx/app.lds
View file

@ -1,4 +1,6 @@
#include "config.h"
#define __ASSEMBLY__
#include "cpu.h"
OUTPUT_FORMAT("elf32-littlemips")
OUTPUT_ARCH(MIPS)
@ -20,10 +22,15 @@ INPUT(target/mips/system-mips.o)
/* Where the codec buffer ends, and the plugin buffer starts */
#define ENDCODECADDR (ENDAUDIOADDR + CODEC_SIZE)
/* Place init code in the codec buffer */
#define INITBASE ENDAUDIOADDR
#define INITSIZE CODEC_SIZE
MEMORY
{
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
INIT : ORIGIN = INITBASE, LENGTH = INITSIZE
}
SECTIONS
@ -40,6 +47,9 @@ SECTIONS
.text :
{
*(.text*);
#ifndef HAVE_INIT_ATTR
*(.init*);
#endif
} > DRAM
. = ALIGN(4);
@ -81,6 +91,16 @@ SECTIONS
} > IRAM
_iramcopy = LOADADDR(.iram);
#ifdef HAVE_INIT_ATTR
.init :
{
_initstart = .;
*(.init*);
_initend = .;
} > INIT AT> DRAM
_initcopy = LOADADDR(.init);
#endif
. = ALIGN(4);
.stack (NOLOAD):

17
firmware/target/mips/ingenic_jz47xx/crt0.S
View file

@ -40,7 +40,7 @@
.text
.extern system_main
.extern system_early_init
.extern main
.global _start
@ -139,6 +139,19 @@ _iram_loop:
bne t1, t2, _iram_loop
sw t3, -4(t1)
#ifdef HAVE_INIT_ATTR
/* Copy init code */
la t0, _initcopy
la t1, _initstart
la t2, _initend
_init_loop:
lw t3, 0(t0)
addiu t1, 4
addiu t0, 4
bne t1, t2, _init_loop
sw t3, -4(t1)
#endif
/*
----------------------------------------------------
Clear BSS section
@ -183,7 +196,7 @@ _irq_stack_loop:
Jump to C code
----------------------------------------------------
*/
jal system_main /* Init clocks etc first */
jal system_early_init /* Init clocks etc first */
ssnop
j main
move ra, zero /* init backtrace root */

2
firmware/target/mips/ingenic_jz47xx/system-jz4740.c
View file

@ -434,7 +434,7 @@ static void sdram_init(void)
}
/* Gets called *before* main */
void ICODE_ATTR system_main(void)
void ICODE_ATTR system_early_init(void)
{
int i;

8
firmware/target/mips/ingenic_jz47xx/system-jz4760.c
View file

@ -533,7 +533,7 @@ static void serial_setbrg(void)
*uart_lcr = tmp;
}
int serial_preinit(void)
static int serial_preinit(void);
{
volatile u8 *uart_fcr = (volatile u8 *)(CFG_UART_BASE + OFF_FCR);
volatile u8 *uart_lcr = (volatile u8 *)(CFG_UART_BASE + OFF_LCR);
@ -569,7 +569,7 @@ int serial_preinit(void)
#define cpu_frequency CPU_FREQ
#endif
void usb_preinit(void)
static void usb_preinit(void)
{
/* Clear ECS bit of CPCCR, 0:clock source is EXCLK, 1:clock source is EXCLK/2 */
REG_CPM_CPCCR &= ~CPCCR_ECS;
@ -621,7 +621,7 @@ void usb_preinit(void)
udelay(300);
}
void dma_preinit(void)
static void dma_preinit(void)
{
__cpm_start_mdma();
__cpm_start_dmac();
@ -636,7 +636,7 @@ void dma_preinit(void)
}
/* Gets called *before* main */
void ICODE_ATTR system_main(void)
void ICODE_ATTR system_early_init(void)
{
int i;