forked from len0rd/rockbox
Configure Gigabeat S with EABI compiler by default. Implement the INIT section that this enables (due to selective need for long calls). Remove pcm_postinit from INIT section since it's asynchronous. Disable strict aliasing on SPC codec for now just to shut it up.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26779 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
parent
d5a27c2fb1
commit
60f843bf18
17 changed files with 50 additions and 43 deletions
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@ -17,7 +17,7 @@ $(SPCLIB): $(SPCLIB_OBJ)
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$(SILENT)$(shell rm -f $@)
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$(SILENT)$(shell rm -f $@)
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$(call PRINTS,AR $(@F))$(AR) rcs $@ $^ >/dev/null
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$(call PRINTS,AR $(@F))$(AR) rcs $@ $^ >/dev/null
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SPCFLAGS = $(filter-out -O%,$(CODECFLAGS))
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SPCFLAGS = $(filter-out -O%,$(CODECFLAGS)) -fno-strict-aliasing
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SPCFLAGS += -O1
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SPCFLAGS += -O1
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$(CODECDIR)/libspc/%.o: $(ROOTDIR)/apps/codecs/libspc/%.c
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$(CODECDIR)/libspc/%.o: $(ROOTDIR)/apps/codecs/libspc/%.c
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@ -778,7 +778,8 @@ Lyre prototype 1 */
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#define IBSS_ATTR
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#define IBSS_ATTR
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#define STATICIRAM static
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#define STATICIRAM static
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#endif
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#endif
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#if (defined(CPU_PP) || (CONFIG_CPU == AS3525) || (CONFIG_CPU == AS3525v2)) \
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#if (defined(CPU_PP) || (CONFIG_CPU == AS3525) || (CONFIG_CPU == AS3525v2) || \
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(CONFIG_CPU == IMX31L)) \
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&& !defined(SIMULATOR) && !defined(BOOTLOADER)
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&& !defined(SIMULATOR) && !defined(BOOTLOADER)
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/* Functions that have INIT_ATTR attached are NOT guaranteed to survive after
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/* Functions that have INIT_ATTR attached are NOT guaranteed to survive after
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* root_menu() has been called. Their code may be overwritten by other data or
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* root_menu() has been called. Their code may be overwritten by other data or
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@ -68,7 +68,7 @@ void pcm_play_lock(void);
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void pcm_play_unlock(void);
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void pcm_play_unlock(void);
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void pcm_init(void) INIT_ATTR;
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void pcm_init(void) INIT_ATTR;
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void pcm_postinit(void) INIT_ATTR;
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void pcm_postinit(void);
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/* This is for playing "raw" PCM data */
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/* This is for playing "raw" PCM data */
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void pcm_play_data(pcm_play_callback_type get_more,
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void pcm_play_data(pcm_play_callback_type get_more,
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@ -32,9 +32,14 @@ STARTUP(target/arm/imx31/crt0.o)
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/* Where the codec buffer ends, and the plugin buffer starts */
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/* Where the codec buffer ends, and the plugin buffer starts */
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#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
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#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
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/* INIT section is the codec buffer */
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#define INITSIZE CODECSIZE
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#define INITSTART ENDAUDIOADDR
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MEMORY
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MEMORY
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{
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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INIT : ORIGIN = INITSTART, LENGTH = INITSIZE
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QHARRAY : ORIGIN = QHARRAY_PHYS_ADDR, LENGTH = QHARRAY_SIZE
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QHARRAY : ORIGIN = QHARRAY_PHYS_ADDR, LENGTH = QHARRAY_SIZE
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}
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}
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@ -97,22 +102,32 @@ SECTIONS
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.vectors 0x0 :
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.vectors 0x0 :
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{
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{
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_vectorsstart = .;
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_vectorsstart = .;
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*(.vectors);
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*(.vectors)
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_vectorsend = .;
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_vectorsend = .;
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} AT> DRAM
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} AT> DRAM
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_vectorscopy = LOADADDR(.vectors);
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_vectorscopy = LOADADDR(.vectors);
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.init :
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{
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. = ALIGN(4);
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_initstart = .;
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*(.init)
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*(.sdmacode)
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_initend = .;
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} > INIT AT> DRAM
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_initcopy = LOADADDR(.init);
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.stack (NOLOAD) :
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.stack (NOLOAD) :
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{
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{
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. = ALIGN(4);
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*(.stack)
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*(.stack)
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stackbegin = .;
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stackbegin = .;
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. += 0x2000;
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. += 0x2000;
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stackend = .;
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stackend = .;
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} > DRAM
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} > DRAM
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_sdmacodecopy = stackbegin;
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.bss (NOLOAD) :
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.bss (NOLOAD) :
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{
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{
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_edata = .;
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_edata = .;
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@ -158,13 +173,6 @@ SECTIONS
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pluginbuf = .;
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pluginbuf = .;
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}
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}
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.sdma _pluginbuf : AT( _sdmacodecopy )
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{
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_sdmacodestart = .;
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*(.sdmacode);
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_sdmacodeend = .;
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}
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.qharray (NOLOAD) :
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.qharray (NOLOAD) :
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{
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{
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_qharray = .;
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_qharray = .;
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@ -116,7 +116,7 @@ void __attribute__((naked)) fiq_handler(void)
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);
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);
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}
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}
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void avic_init(void)
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void INIT_ATTR avic_init(void)
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{
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{
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int i;
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int i;
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@ -231,20 +231,18 @@ remap_end:
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bhi 1b
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bhi 1b
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#endif /* BOOTLOADER */
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#endif /* BOOTLOADER */
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#ifndef BOOTLOADER
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#ifdef HAVE_INIT_ATTR
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/* Copy discardable SDMA code - loaded in the stack section
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/* copy init data to codec buffer */
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* and so must be done first. Destination is the plugin buffer
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/* must be done before bss is zeroed */
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* which is safe when SDMA init takes place just after kernel
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ldr r4, =_initcopy
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* init. */
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ldr r3, =_initend
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ldr r4, =_sdmacodecopy
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ldr r2, =_initstart
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ldr r3, =_sdmacodeend
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ldr r2, =_sdmacodestart
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1:
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1:
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cmp r3, r2
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cmp r3, r2
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ldrhi r5, [r4], #4
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ldrhi r5, [r4], #4
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strhi r5, [r2], #4
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strhi r5, [r2], #4
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bhi 1b
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bhi 1b
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#endif /* BOOTLOADER */
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#endif /* HAVE_INIT_ATTR */
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/* Initialise bss and ncbss sections to zero */
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/* Initialise bss and ncbss sections to zero */
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ldr r2, =_edata
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ldr r2, =_edata
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@ -248,7 +248,7 @@ static __attribute__((naked, interrupt("IRQ"))) void CCM_DVFS_HANDLER(void)
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/* Initialize the DVFS hardware */
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/* Initialize the DVFS hardware */
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static void dvfs_init(void)
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static void INIT_ATTR dvfs_init(void)
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{
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{
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if (CCM_PMCR0 & CCM_PMCR0_DVFEN)
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if (CCM_PMCR0 & CCM_PMCR0_DVFEN)
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{
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{
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@ -514,7 +514,7 @@ static __attribute__((interrupt("IRQ"))) void CCM_CLK_HANDLER(void)
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/* Initialize the DPTC hardware */
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/* Initialize the DPTC hardware */
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static void dptc_init(void)
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static void INIT_ATTR dptc_init(void)
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{
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{
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/* Force DPTC off if running for some reason. */
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/* Force DPTC off if running for some reason. */
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imx31_regmod32(&CCM_PMCR0, CCM_PMCR0_PTVAIM,
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imx31_regmod32(&CCM_PMCR0, CCM_PMCR0_PTVAIM,
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@ -590,7 +590,7 @@ static void dptc_stop(void)
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/** Main module interface **/
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/** Main module interface **/
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/* Initialize DVFS and DPTC */
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/* Initialize DVFS and DPTC */
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void dvfs_dptc_init(void)
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void INIT_ATTR dvfs_dptc_init(void)
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{
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{
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dptc_init();
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dptc_init();
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dvfs_init();
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dvfs_init();
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@ -184,7 +184,7 @@ bool headphones_inserted(void)
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return headphones_detect;
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return headphones_detect;
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}
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}
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void headphone_init(void)
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void INIT_ATTR headphone_init(void)
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{
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{
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/* A thread is required to monitor the remote ADC and jack state. */
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/* A thread is required to monitor the remote ADC and jack state. */
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wakeup_init(&headphone_wakeup);
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wakeup_init(&headphone_wakeup);
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@ -37,7 +37,7 @@ static __attribute__((interrupt("IRQ"))) void EPIT1_HANDLER(void)
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call_tick_tasks();
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call_tick_tasks();
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}
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}
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void tick_start(unsigned int interval_in_ms)
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void INIT_ATTR tick_start(unsigned int interval_in_ms)
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{
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{
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ccm_module_clock_gating(CG_EPIT1, CGM_ON_RUN_WAIT); /* EPIT1 module
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ccm_module_clock_gating(CG_EPIT1, CGM_ON_RUN_WAIT); /* EPIT1 module
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clock ON - before writing
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clock ON - before writing
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@ -65,7 +65,7 @@ void tick_start(unsigned int interval_in_ms)
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EPITCR1 |= EPITCR_EN; /* Enable the counter */
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EPITCR1 |= EPITCR_EN; /* Enable the counter */
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}
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}
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void kernel_device_init(void)
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void INIT_ATTR kernel_device_init(void)
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{
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{
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sdma_init();
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sdma_init();
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spi_init();
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spi_init();
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@ -147,7 +147,7 @@ static void lcd_set_power(bool powered)
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}
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}
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/* LCD init */
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/* LCD init */
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void lcd_init_device(void)
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void INIT_ATTR lcd_init_device(void)
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{
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{
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/* Move the framebuffer */
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/* Move the framebuffer */
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#ifdef BOOTLOADER
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#ifdef BOOTLOADER
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@ -606,7 +606,7 @@ static bool charging_ok(void)
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return ok;
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return ok;
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}
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}
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void powermgmt_init_target(void)
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void INIT_ATTR powermgmt_init_target(void)
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{
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{
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last_inputs = power_thread_inputs;
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last_inputs = power_thread_inputs;
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@ -48,7 +48,7 @@ unsigned int iim_prod_rev(void)
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return product_rev;
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return product_rev;
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}
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}
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static void iim_init(void)
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static void INIT_ATTR iim_init(void)
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{
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{
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/* Initialize the IC revision info (required by SDMA) */
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/* Initialize the IC revision info (required by SDMA) */
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ccm_module_clock_gating(CG_IIM, CGM_ON_RUN_WAIT);
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ccm_module_clock_gating(CG_IIM, CGM_ON_RUN_WAIT);
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@ -136,7 +136,7 @@ void system_exception_wait(void)
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system_halt();
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system_halt();
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}
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}
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void system_init(void)
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void INIT_ATTR system_init(void)
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{
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{
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static const int disable_clocks[] =
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static const int disable_clocks[] =
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{
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{
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@ -150,7 +150,7 @@ static __attribute__((interrupt("IRQ"))) void GPIO3_HANDLER(void)
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}
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}
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#endif
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#endif
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void gpio_init(void)
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void INIT_ATTR gpio_init(void)
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{
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{
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/* Mask-out GPIO interrupts - enable what's wanted later */
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/* Mask-out GPIO interrupts - enable what's wanted later */
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int i;
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int i;
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@ -143,7 +143,7 @@ void mc13783_event(void)
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wakeup_signal(&mc13783_svc_wake);
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wakeup_signal(&mc13783_svc_wake);
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}
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}
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void mc13783_init(void)
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void INIT_ATTR mc13783_init(void)
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{
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{
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/* Serial interface must have been initialized first! */
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/* Serial interface must have been initialized first! */
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wakeup_init(&mc13783_svc_wake);
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wakeup_init(&mc13783_svc_wake);
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@ -500,7 +500,7 @@ static bool setup_channel(struct channel_control_block *ccb_p)
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}
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}
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/** Public routines **/
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/** Public routines **/
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void sdma_init(void)
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void INIT_ATTR sdma_init(void)
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{
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{
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int i;
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int i;
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unsigned long acr;
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unsigned long acr;
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@ -331,7 +331,7 @@ static __attribute__((interrupt("IRQ"))) void CSPI3_HANDLER(void)
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#endif
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#endif
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/* Initialize the SPI driver */
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/* Initialize the SPI driver */
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void spi_init(void)
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void INIT_ATTR spi_init(void)
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{
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{
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unsigned i;
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unsigned i;
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for (i = 0; i < SPI_NUM_CSPI; i++)
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for (i = 0; i < SPI_NUM_CSPI; i++)
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2
tools/configure
vendored
2
tools/configure
vendored
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@ -40,7 +40,7 @@ prefixtools () {
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}
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}
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findarmgcc() {
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findarmgcc() {
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models_not_checked_with_eabi="iriverh10 iriverh10_5gb ipodcolor ipodnano1g ipodvideo ipod3g ipod4g ipodmini1g ipodmini2g ipod1g2g ipodnano2g iaudio7 cowond2 gigabeatfx gigabeats mrobe500 mrobe100 sansae200 sansac200 sansae200r vibe500"
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models_not_checked_with_eabi="iriverh10 iriverh10_5gb ipodcolor ipodnano1g ipodvideo ipod3g ipod4g ipodmini1g ipodmini2g ipod1g2g ipodnano2g iaudio7 cowond2 gigabeatfx mrobe500 mrobe100 sansae200 sansac200 sansae200r vibe500"
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if [ "$ARG_ARM_EABI" != 1 ]; then # eabi not explicitely enabled
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if [ "$ARG_ARM_EABI" != 1 ]; then # eabi not explicitely enabled
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for model in $models_not_checked_with_eabi; do
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for model in $models_not_checked_with_eabi; do
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if [ "$modelname" = "$model" ]; then
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if [ "$modelname" = "$model" ]; then
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