forked from len0rd/rockbox
Fuze V2: Fix hold switch behavior. Add a GPIOx_PIN_MASK macro to AS3525.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29096 a1c6a512-1295-4272-9138-f99709370657
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2 changed files with 15 additions and 22 deletions
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@ -343,7 +343,6 @@ CE lines
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/* GPIO registers */
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#define GPIOA_DIR (*(volatile unsigned char*)(GPIOA_BASE+0x400))
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#define GPIOA_IS (*(volatile unsigned char*)(GPIOA_BASE+0x404))
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#define GPIOA_IBE (*(volatile unsigned char*)(GPIOA_BASE+0x408))
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@ -354,6 +353,7 @@ CE lines
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#define GPIOA_IC (*(volatile unsigned char*)(GPIOA_BASE+0x41C))
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#define GPIOA_AFSEL (*(volatile unsigned char*)(GPIOA_BASE+0x420))
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#define GPIOA_PIN(a) (*(volatile unsigned char*)(GPIOA_BASE+(1<<((a)+2))))
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#define GPIOA_PIN_MASK(m) (*(volatile unsigned char *)(GPIOA_BASE+(((m)&0xff)<<2)))
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#define GPIOA_DATA (*(volatile unsigned char*)(GPIOA_BASE+(0xff<<2)))
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@ -367,6 +367,7 @@ CE lines
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#define GPIOB_IC (*(volatile unsigned char*)(GPIOB_BASE+0x41C))
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#define GPIOB_AFSEL (*(volatile unsigned char*)(GPIOB_BASE+0x420))
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#define GPIOB_PIN(a) (*(volatile unsigned char*)(GPIOB_BASE+(1<<((a)+2))))
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#define GPIOB_PIN_MASK(m) (*(volatile unsigned char *)(GPIOB_BASE+(((m)&0xff)<<2)))
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#define GPIOB_DATA (*(volatile unsigned char*)(GPIOB_BASE+(0xff<<2)))
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#define GPIOC_DIR (*(volatile unsigned char*)(GPIOC_BASE+0x400))
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@ -379,6 +380,7 @@ CE lines
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#define GPIOC_IC (*(volatile unsigned char*)(GPIOC_BASE+0x41C))
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#define GPIOC_AFSEL (*(volatile unsigned char*)(GPIOC_BASE+0x420))
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#define GPIOC_PIN(a) (*(volatile unsigned char*)(GPIOC_BASE+(1<<((a)+2))))
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#define GPIOC_PIN_MASK(m) (*(volatile unsigned char *)(GPIOC_BASE+(((m)&0xff)<<2)))
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#define GPIOC_DATA (*(volatile unsigned char*)(GPIOC_BASE+(0xff<<2)))
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#define GPIOD_DIR (*(volatile unsigned char*)(GPIOD_BASE+0x400))
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@ -391,6 +393,7 @@ CE lines
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#define GPIOD_IC (*(volatile unsigned char*)(GPIOD_BASE+0x41C))
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#define GPIOD_AFSEL (*(volatile unsigned char*)(GPIOD_BASE+0x420))
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#define GPIOD_PIN(a) (*(volatile unsigned char*)(GPIOD_BASE+(1<<((a)+2))))
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#define GPIOD_PIN_MASK(m) (*(volatile unsigned char *)(GPIOD_BASE+(((m)&0xff)<<2)))
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#define GPIOD_DATA (*(volatile unsigned char*)(GPIOD_BASE+(0xff<<2)))
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/* ARM PL172 Memory Controller registers */
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@ -196,31 +196,26 @@ void button_init_device(void)
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#endif
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}
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/* read the 2 bits at the same time */
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#define GPIOA_PIN76_offset ((1<<(6+2)) | (1<<(7+2)))
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#define GPIOA_PIN76 (*(volatile unsigned char*)(GPIOA_BASE+GPIOA_PIN76_offset))
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void button_gpioa_isr(void)
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{
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#if defined(HAVE_SCROLLWHEEL)
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/* scroll wheel handling */
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if (GPIOA_MIS & SCROLLWHEEL_BITS)
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scrollwheel(GPIOA_PIN76 >> 6);
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scrollwheel(GPIOA_PIN_MASK(0xc0) >> 6);
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/* ack interrupt */
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GPIOA_IC = SCROLLWHEEL_BITS;
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#endif
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}
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/*
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* Get button pressed from hardware
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*/
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int button_read_device(void)
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{
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int btn = 0;
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static bool hold_button_old = false;
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static long power_counter = 0;
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bool hold = false;
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unsigned gpiod6;
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/* if we don't wait for the fifo to empty, we'll see screen corruption
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@ -264,14 +259,9 @@ int button_read_device(void)
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{ /* power/hold is on the same pin. we know it's hold if the bit isn't
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* set now anymore */
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if (GPIOD_PIN(6) & 1<<6)
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{
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hold_button = false;
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btn |= BUTTON_POWER;
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}
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else
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{
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hold_button = true;
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}
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hold = true;
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}
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if(gpiob_pin0_dir)
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@ -283,21 +273,21 @@ int button_read_device(void)
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#ifdef HAS_BUTTON_HOLD
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#ifndef BOOTLOADER
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/* light handling */
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if (hold_button != hold_button_old)
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if (hold != hold_button)
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{
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hold_button_old = hold_button;
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backlight_hold_changed(hold_button);
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hold_button = hold;
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backlight_hold_changed(hold);
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/* mask scrollwheel irq so we don't need to check for
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* the hold button in the isr */
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if (hold_button)
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if (hold)
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GPIOA_IE &= ~SCROLLWHEEL_BITS;
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else
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GPIOA_IE |= SCROLLWHEEL_BITS;
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}
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#else
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(void)hold_button_old;
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#endif
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if (hold_button)
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hold_button = hold;
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#endif /* BOOTLOADER */
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if (hold)
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{
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power_counter = HZ;
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return 0;
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@ -311,7 +301,7 @@ int button_read_device(void)
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power_counter--;
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btn &= ~BUTTON_POWER;
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}
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#endif
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#endif /* HAS_BUTTON_HOLD */
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return btn;
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}
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