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Unify the Gigabeat F/X and M:Robe MMU code while enabling it for the M:Robe

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15275 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Karl Kurbjun 2007-10-23 03:29:15 +00:00
parent 9d9225ed1d
commit 5a9a2b7bc4
15 changed files with 98 additions and 73 deletions
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2
bootloader/gigabeat.c
View file

@ -41,7 +41,7 @@
#include "common.h"
#include "rbunicode.h"
#include "usb.h"
#include "mmu-meg-fx.h"
#include "mmu-arm.h"
#include <stdarg.h>

6
firmware/SOURCES
View file

@ -576,6 +576,7 @@ target/arm/usb-fw-pp502x.c
#ifdef GIGABEAT_F
#ifndef SIMULATOR
target/arm/lcd-as-memframe.S
target/arm/mmu-arm.c
target/arm/s3c2440/gigabeat-fx/adc-meg-fx.c
target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c
target/arm/s3c2440/gigabeat-fx/backlight-meg-fx.c
@ -591,7 +592,6 @@ target/arm/s3c2440/gigabeat-fx/usb-meg-fx.c
target/arm/s3c2440/gigabeat-fx/wmcodec-meg-fx.c
target/arm/s3c2440/gigabeat-fx/dma_start.c
target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.c
#ifndef BOOTLOADER
target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
#endif
@ -626,6 +626,7 @@ target/arm/imx31/gigabeat-s/pcm-imx31.c
#ifdef MROBE_500
#ifndef SIMULATOR
target/arm/lcd-as-memframe.S
target/arm/mmu-arm.c
target/arm/tms320dm320/mrobe-500/adc-mr500.c
target/arm/tms320dm320/mrobe-500/ata-mr500.c
target/arm/tms320dm320/mrobe-500/backlight-mr500.c
@ -645,9 +646,6 @@ target/arm/tms320dm320/spi-dm320.c
target/arm/tms320dm320/system-dm320.c
target/arm/tms320dm320/timer-dm320.c
target/arm/tms320dm320/uart-dm320.c
#ifndef BOOTLOADER
#endif
#endif /* SIMULATOR */
#endif /* MROBE_500 */

2
firmware/app.lds
View file

@ -35,7 +35,7 @@ INPUT(target/sh/crt0.o)
#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE
#elif CONFIG_CPU==DM320
#include "dm320.h"
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE
#else
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE
#endif

5
firmware/export/dm320.h
View file

@ -25,7 +25,10 @@
#define __DM320_H__
#define LCD_BUFFER_SIZE (640*480*4)
#define FRAME ((short *) (0x4900000-LCD_BUFFER_SIZE)) /* Put the buffer at the end of mem */
#define TTB_SIZE (0x4000)
/* must be 16Kb (0x4000) aligned */
#define TTB_BASE ((unsigned int *)(0x04900000 - TTB_SIZE)) /* End of memory */
#define FRAME ((short *) (TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */
#define PHY_IO_BASE 0x00030000
#define DM320_REG(addr) (*(volatile unsigned short *)(PHY_IO_BASE + (addr)))

2
firmware/export/s3c2440.h
View file

@ -229,7 +229,7 @@
#define TTB_SIZE (0x4000)
/*#define FRAME ( (short *) 0x31E00000 ) */ /* LCD Frame buffer - Firmware Address */
/* must be 16Kb (0x4000) aligned */
#define TTB_BASE (0x30000000 + (32*1024*1024) - TTB_SIZE) /* End of memory */
#define TTB_BASE ((unsigned int *)(0x30000000 + (32*1024*1024) - TTB_SIZE)) /* End of memory */
#define FRAME ((short *) (TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */
/* NAND Flash */

89
firmware/target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.c → firmware/target/arm/mmu-arm.c
View file

@ -1,51 +1,42 @@
#include <string.h>
#include "s3c2440.h"
#include "mmu-meg-fx.h"
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2006,2007 by Greg White
*
* All files in this archive are subject to the GNU General Public License.
* See the file COPYING in the source tree root for full license agreement.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "cpu.h"
#include "mmu-arm.h"
#include "panic.h"
static void enable_mmu(void);
static void set_ttb(void);
static void set_page_tables(void);
static void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags);
#define SECTION_ADDRESS_MASK (-1 << 20)
#define CACHE_ALL (1 << 3 | 1 << 2 )
#define CACHE_NONE 0
#define BUFFERED (1 << 2)
#define MB (1 << 20)
void memory_init(void) {
set_ttb();
set_page_tables();
enable_mmu();
}
void ttb_init(void) {
unsigned int* ttbPtr;
unsigned int* ttb_base = (unsigned int *) TTB_BASE;
const int ttb_size = 4096;
/* must be 16Kb (0x4000) aligned - clear out the TTB */
for (ttbPtr=TTB_BASE; ttbPtr<(TTB_SIZE+TTB_BASE); ttbPtr++)
{
*ttbPtr = 0;
}
void set_ttb() {
int i;
int* ttbPtr;
int domain_access;
/* Set the TTB base address */
asm volatile("mcr p15, 0, %0, c2, c0, 0" : : "r" (TTB_BASE));
/* must be 16Kb (0x4000) aligned */
ttb_base = (int*) TTB_BASE;
for (i=0; i<ttb_size; i++,ttbPtr++)
ttbPtr = 0;
asm volatile("mcr p15, 0, %0, c2, c0, 0" : : "r" (ttb_base));
/* set domain D0 to "client" permission access */
domain_access = 3;
asm volatile("mcr p15, 0, %0, c3, c0, 0" : : "r" (domain_access));
}
void set_page_tables() {
map_section(0, 0, 0x1000, CACHE_NONE); /* map every memory region to itself */
map_section(0x30000000, 0, 32, CACHE_ALL); /* map RAM to 0 and enable caching for it */
map_section((int)FRAME, (int)FRAME, 1, BUFFERED); /* enable buffered writing for the framebuffer */
/* Set all domains to manager status */
asm volatile("mcr p15, 0, %0, c3, c0, 0" : : "r" (0xFFFFFFFF));
}
void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags) {
@ -54,20 +45,20 @@ void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags) {
int section_no;
section_no = va >> 20; /* sections are 1Mb size */
ttbPtr = ttb_base + section_no;
ttbPtr = TTB_BASE + section_no;
pa &= SECTION_ADDRESS_MASK; /* align to 1Mb */
for(i=0; i<mb; i++, pa += MB) {
*(ttbPtr + i) =
pa |
1 << 10 | /* superuser - r/w, user - no access */
0 << 5 | /* domain 0th */
1 << 4 | /* should be "1" */
cache_flags |
1 << 1; /* Section signature */
*(ttbPtr + i) =
pa |
1 << 10 | /* superuser - r/w, user - no access */
0 << 5 | /* domain 0th */
1 << 4 | /* should be "1" */
cache_flags |
1 << 1; /* Section signature */
}
}
static void enable_mmu(void) {
void enable_mmu(void) {
int regread;
asm volatile(

8
firmware/target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.h → firmware/target/arm/mmu-arm.h
View file

@ -17,6 +17,14 @@
*
****************************************************************************/
#define CACHE_ALL (1 << 3 | 1 << 2 )
#define CACHE_NONE 0
#define BUFFERED (1 << 2)
void ttb_init(void);
void enable_mmu(void);
void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags);
/* Invalidate DCache for this range */
/* Will do write back */
void invalidate_dcache_range(const void *base, unsigned int size);

1
firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c
View file

@ -25,7 +25,6 @@
#include "panic.h"
#include "pcf50606.h"
#include "ata-target.h"
#include "mmu-meg-fx.h"
#include "backlight-target.h"
/* ARESET on C7C68300 and RESET on ATA interface (Active Low) */

1
firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
View file

@ -23,7 +23,6 @@
#include "audio.h"
#include "sound.h"
#include "file.h"
#include "mmu-meg-fx.h"
/* All exact rates for 16.9344MHz clock */
#define GIGABEAT_11025HZ (0x19 << 1)

16
firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
View file

@ -1,7 +1,8 @@
#include "kernel.h"
#include "system.h"
#include "panic.h"
#include "mmu-meg-fx.h"
#include "mmu-arm.h"
#include "cpu.h"
#define default_interrupt(name) \
extern __attribute__((weak,alias("UIRQ"))) void name (void)
@ -90,6 +91,19 @@ void system_reboot(void)
;
}
static void set_page_tables(void)
{
map_section(0, 0, 0x1000, CACHE_NONE); /* map every memory region to itself */
map_section(0x30000000, 0, 32, CACHE_ALL); /* map RAM to 0 and enable caching for it */
map_section((int)FRAME, (int)FRAME, 1, BUFFERED); /* enable buffered writing for the framebuffer */
}
void memory_init(void) {
ttb_init();
set_page_tables();
enable_mmu();
}
void system_init(void)
{
/* Disable interrupts and set all to IRQ mode */

2
firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
View file

@ -19,8 +19,8 @@
#ifndef SYSTEM_TARGET_H
#define SYSTEM_TARGET_H
#include "mmu-meg-fx.h"
#include "system-arm.h"
#include "mmu-arm.h"
#define CPUFREQ_DEFAULT 98784000
#define CPUFREQ_NORMAL 98784000

18
firmware/target/arm/tms320dm320/crt0.S
View file

@ -48,14 +48,19 @@ start:
str r0, [r1, #28]
#endif
/* Disable high vectors (at 0xffff0000 instead of 0x00000000) */
mrc p15, 0, r0, c1, c0
and r0, r0, #~(1<<13)
mcr p15, 0, r0, c1, c0
/* Disable data and instruction cache, high vectors (at 0xffff0000 instead of 0x00000000) */
mrc p15, 0, r0, c1, c0, 0
/* clear bits 13, 9:8 (--VI --RS) */
bic r0, r0, #0x00003300
/* clear bits 7, 2:0 (B--- -C-M) */
bic r0, r0, #0x00000085
/* make sure bit 2 (A) Align is set */
orr r0, r0, #0x00000002
mcr p15, 0, r0, c1, c0, 0
#if !defined(BOOTLOADER)
#if 0//!defined(STUB)
#if !defined(STUB)
/* Zero out IBSS */
ldr r2, =_iedata
ldr r3, =_iend
@ -64,8 +69,7 @@ start:
cmp r3, r2
strhi r4, [r2], #4
bhi 1b
#endif
#if 1
/* Copy the IRAM */
ldr r2, =_iramcopy
ldr r3, =_iramstart

1
firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c
View file

@ -82,7 +82,6 @@ void lcd_init_device(void)
void lcd_update_rect(int x, int y, int width, int height)
{
fb_data *dst, *src;
int yc;
if (!lcd_on)
return;

15
firmware/target/arm/tms320dm320/system-dm320.c
View file

@ -16,7 +16,8 @@
* KIND, either express or implied.
*
****************************************************************************/
#include "cpu.h"
#include "mmu-arm.h"
#include "kernel.h"
#include "system.h"
#include "panic.h"
@ -26,6 +27,9 @@
#define default_interrupt(name) \
extern __attribute__((weak,alias("UIRQ"))) void name (void)
void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
default_interrupt(TIMER0);
default_interrupt(TIMER1);
default_interrupt(TIMER2);
@ -101,7 +105,6 @@ static void UIRQ(void)
panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]);
}
void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
void irq_handler(void)
{
/*
@ -116,7 +119,6 @@ void irq_handler(void)
"subs pc, lr, #4 \n"); /* Return from FIQ */
}
void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
void fiq_handler(void)
{
/*
@ -179,6 +181,13 @@ void system_init(void)
enable_interrupts();
uart_init();
spi_init();
/* MMU initialization (Starts data and instruction cache) */
ttb_init();
map_section(0, 0, 0x1000, CACHE_NONE); /* Make sure everything is mapped on itself */
map_section(0x00900000, 0x00900000, 64, CACHE_ALL); /* Enable caching for RAM */
map_section((int)FRAME, (int)FRAME, 2, BUFFERED); /* enable buffered writing for the framebuffer */
enable_mmu();
}
int system_memory_guard(int newmode)

3
firmware/target/arm/tms320dm320/uart-dm320.c
View file

@ -24,7 +24,8 @@
#define CONFIG_UART_BRSR 87
#define MAX_UART_BUFFER 31
unsigned char uart1buffer[MAX_UART_BUFFER];
unsigned char uart1buffer[MAX_UART_BUFFER], uart1_send_buffer_ring[512];
int uart1_send_count=0,uart1_send_point=0;
int uart1read = 0, uart1write = 0, uart1count = 0;
/*