forked from len0rd/rockbox
Read ID codes & raw page data from D2 NAND flash (work in progress;
no logical->physical address translation yet) git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16167 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rob Purchase
parent
b4f80fb93f
commit
5991478628
3 changed files with 365 additions and 10 deletions
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@ -7,7 +7,7 @@
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 Dave Chapman
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* Copyright (C) 2008 Rob Purchase
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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@ -32,12 +32,335 @@ int ata_spinup_time = 0;
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long last_disk_activity = -1;
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/** static, private data **/
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/** static, private data **/
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static bool initialized = false;
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static long next_yield = 0;
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#define MIN_YIELD_PERIOD 2000
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/* TCC780x NAND Flash Controller */
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#define NFC_CMD (*(volatile unsigned long *)0xF0053000)
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#define NFC_SADDR (*(volatile unsigned long *)0xF005300C)
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#define NFC_SDATA (*(volatile unsigned long *)0xF0053040)
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#define NFC_WDATA (*(volatile unsigned long *)0xF0053010)
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#define NFC_CTRL (*(volatile unsigned long *)0xF0053050)
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#define NFC_IREQ (*(volatile unsigned long *)0xF0053060)
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#define NFC_RST (*(volatile unsigned long *)0xF0053064)
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#define NFC_16BIT (1<<26)
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#define NFC_CS0 (1<<23)
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#define NFC_CS1 (1<<22)
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#define NFC_READY (1<<20)
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#if defined(COWON_D2)
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/*
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===== Temporary D2 testing code =====
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(assumes SAMSUNG K9LAG08UOM (2GB) in 1, 2 or 4 banks)
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Manufacturer Id: {0xec, 0xd5, 0x55, 0x25, 0x68}
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*/
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#define PAGE_SIZE 2048
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#define SPARE_SIZE 64
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#define PAGES_PER_BLOCK 128
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#define TOTAL_BLOCKS 8192
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#define TOTAL_PAGES (TOTAL_BLOCKS * PAGES_PER_BLOCK)
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#define COL_CYCLES 2
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#define ROW_CYCLES 3
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static int page_buf[PAGE_SIZE/4];
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static void nand_chip_select(int chip)
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{
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if (chip == -1)
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{
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/* Disable both chip selects */
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GPIOB_CLEAR = (1<<21);
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NFC_CTRL |= NFC_CS0 | NFC_CS1;
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}
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else
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{
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/* NFC chip select */
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if (chip & 1)
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{
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NFC_CTRL &= ~NFC_CS0;
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NFC_CTRL |= NFC_CS1;
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}
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else
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{
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NFC_CTRL |= NFC_CS0;
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NFC_CTRL &= ~NFC_CS1;
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}
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/* Secondary chip select */
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if (chip & 2)
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{
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GPIOB_SET = (1<<21);
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}
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else
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{
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GPIOB_CLEAR = (1<<21);
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}
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}
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}
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static void nand_read_id(int chip, unsigned char* id_buf)
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{
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int i;
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/* Enable NFC bus clock */
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BCLKCTR |= DEV_NAND;
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/* Reset NAND controller */
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NFC_RST = 0;
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/* Set slow cycle timings since the chip is as yet unidentified */
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NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x353;
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nand_chip_select(chip);
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/* Set write protect */
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GPIOB_CLEAR = (1<<19);
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/* Reset command */
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NFC_CMD = 0xFF;
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/* Set 8-bit data width */
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NFC_CTRL &= ~NFC_16BIT;
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/* Read ID command, single address cycle */
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NFC_CMD = 0x90;
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NFC_SADDR = 0x00;
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/* Read the 5 single bytes */
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id_buf[0] = NFC_SDATA & 0xFF;
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id_buf[1] = NFC_SDATA & 0xFF;
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id_buf[2] = NFC_SDATA & 0xFF;
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id_buf[3] = NFC_SDATA & 0xFF;
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id_buf[4] = NFC_SDATA & 0xFF;
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nand_chip_select(-1);
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/* Disable NFC bus clock */
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BCLKCTR &= ~DEV_NAND;
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}
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static void nand_read_uid(int chip)
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{
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int i;
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/* Enable NFC bus clock */
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BCLKCTR |= DEV_NAND;
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/* Set cycle timing (stp = 1, pw = 3, hold = 1) */
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NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
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nand_chip_select(chip);
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/* Set write protect */
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GPIOB_CLEAR = 1<<19;
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/* Set 8-bit data width */
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NFC_CTRL &= ~NFC_16BIT;
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/* Undocumented (SAMSUNG specific?) commands set the chip into a
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special mode allowing a normally-hidden UID block to be read. */
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NFC_CMD = 0x30;
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NFC_CMD = 0x65;
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/* Read command */
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NFC_CMD = 0x00;
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/* Write row/column address */
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for (i = 0; i < COL_CYCLES; i++) NFC_SADDR = 0;
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for (i = 0; i < ROW_CYCLES; i++) NFC_SADDR = 0;
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/* End of read */
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NFC_CMD = 0x30;
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/* Wait until complete */
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while (!(NFC_CTRL & NFC_READY)) {};
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/* Copy data to buffer (data repeats after 8 words) */
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for (i = 0; i < 8; i++)
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{
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page_buf[i] = NFC_WDATA;
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}
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/* Reset the chip back to normal mode */
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NFC_CMD = 0xFF;
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nand_chip_select(-1);
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/* Disable NFC bus clock */
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BCLKCTR &= ~DEV_NAND;
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}
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/* NB: size must be divisible by 4 due to 32-bit read */
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static void nand_read(int chip, int row, int column, int size)
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{
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int i;
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/* Enable NFC bus clock */
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BCLKCTR |= DEV_NAND;
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/* Set cycle timing (stp = 1, pw = 3, hold = 1) */
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NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
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nand_chip_select(chip);
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/* Set write protect */
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GPIOB_CLEAR = (1<<19);
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/* Set 8-bit data width */
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NFC_CTRL &= ~NFC_16BIT;
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/* Read command */
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NFC_CMD = 0x00;
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/* Write column address */
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for (i = 0; i < COL_CYCLES; i++)
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{
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NFC_SADDR = column & 0xFF;
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column = column >> 8;
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}
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/* Write row address */
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for (i = 0; i < ROW_CYCLES; i++)
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{
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NFC_SADDR = row & 0xFF;
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row = row >> 8;
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}
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/* End of read command */
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NFC_CMD = 0x30;
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/* Wait until complete */
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while (!(NFC_CTRL & NFC_READY)) {};
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/* Read data into page buffer */
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for (i = 0; i < (size/4); i++)
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{
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page_buf[i] = NFC_WDATA;
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}
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nand_chip_select(-1);
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/* Disable NFC bus clock */
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BCLKCTR &= ~DEV_NAND;
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}
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/* TEMP testing function */
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#include <string.h>
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#include "lcd.h"
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extern int line;
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static void nand_test(void)
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{
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int i,j,row;
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unsigned char id_buf[5];
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unsigned char str_buf[PAGE_SIZE];
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/* Display ID codes & UID block for each bank */
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for (i = 0; i < 4; i++)
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{
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printf("NAND bank %d:", i);
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nand_read_id(i, id_buf);
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printf("ID: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
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id_buf[0],id_buf[1],id_buf[2],id_buf[3],id_buf[4]);
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nand_read_uid(i);
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for (j = 0; j < 8; j += 4)
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{
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printf("0x%08x 0x%08x 0x%08x 0x%08x",
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page_buf[j],page_buf[j+1],page_buf[j+2],page_buf[j+3]);
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}
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line++;
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}
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while (!button_read_device()) {};
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/* Now for fun, scan the raw pages for 'TAG' and display the contents */
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row = 0;
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while (row < TOTAL_PAGES)
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{
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bool found = false;
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unsigned char* buf_ptr = (unsigned char*)page_buf;
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line = 0;
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/* Read a page from chip 0 */
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nand_read(0, row, 0, PAGE_SIZE);
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if (row % 512 == 0) printf("%dMb", row/512);
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for (j = 0; j < PAGE_SIZE; j++)
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{
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if (buf_ptr[j] == 'T' && buf_ptr[j+1] == 'A' && buf_ptr[j+2] == 'G')
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found = true;
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}
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if (found)
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{
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unsigned char* str_ptr = str_buf;
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printf("Row %d:", row);
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/* Copy ascii-readable parts out to a string */
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for (i = 0; i < PAGE_SIZE; i++)
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{
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str_buf[i] = ' ';
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if (buf_ptr[i] > 31 && buf_ptr[i] < 128)
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{
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*str_ptr++ = buf_ptr[i];
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}
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}
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str_ptr = str_buf;
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/* Nasty piece of code to display the text in a readable manner */
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for (i = 1; i < 30; i++)
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{
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for (j = 0; j < 48; j++)
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{
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/* In the absence of a putc() we have this mess... */
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unsigned char buf2[2];
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buf2[0] = *str_ptr++;
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buf2[1] = '\0';
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lcd_puts(j,i,buf2);
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}
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}
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/* Alternate hex display code
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for (i = 0; i<112; i+=4)
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{
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printf("0x%08x 0x%08x 0x%08x 0x%08x",buf[i],buf[i+1],buf[i+2],buf[i+3]);
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}
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*/
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while (!button_read_device()) {};
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lcd_clear_display();
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}
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row++;
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}
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}
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#endif
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/* API Functions */
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void ata_led(bool onoff)
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@ -67,7 +390,7 @@ int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
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void ata_spindown(int seconds)
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{
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#warning function not implemented
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/* null */
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(void)seconds;
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}
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@ -84,7 +407,7 @@ void ata_sleep(void)
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void ata_spin(void)
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{
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#warning function not implemented
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/* null */
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}
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/* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
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@ -109,5 +432,17 @@ void ata_enable(bool on)
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int ata_init(void)
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{
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#warning function not implemented
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/* This needs to:
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a) establish how many banks are present
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(using nand_read_id() and nand_read_uid() above)
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b) scan all banks for bad blocks
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c) use this info to build a physical->logical address translation
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(using an as yet unknown scheme)
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*/
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/* TEMP - print out some diagnostics */
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nand_test();
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return 0;
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}
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