forked from len0rd/rockbox
Re-added libspc which got dropped in a black hole.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19019 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Björn Stenberg
parent
45bd7e0246
commit
5791d1c658
8 changed files with 3350 additions and 0 deletions
454
apps/codecs/libspc/spc_codec.h
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454
apps/codecs/libspc/spc_codec.h
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007-2008 Michael Sevakis (jhMikeS)
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* Copyright (C) 2006-2007 Adam Gashlin (hcs)
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* Copyright (C) 2004-2007 Shay Green (blargg)
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* Copyright (C) 2002 Brad Martin
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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/* lovingly ripped off from Game_Music_Emu 0.5.2. http://www.slack.net/~ant/ */
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/* DSP Based on Brad Martin's OpenSPC DSP emulator */
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/* tag reading from sexyspc by John Brawn (John_Brawn@yahoo.com) and others */
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#ifndef _SPC_CODEC_H_
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#define _SPC_CODEC_H_
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/* rather than comment out asserts, just define NDEBUG */
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#define NDEBUG
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#include <assert.h>
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/** Basic configuration options **/
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#define SPC_DUAL_CORE 1
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#if !defined(SPC_DUAL_CORE) || NUM_CORES == 1
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#undef SPC_DUAL_CORE
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#define SPC_DUAL_CORE 0
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#endif
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/* TGB is the only target fast enough for gaussian and realtime BRR decode */
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/* echo is almost fast enough but not quite */
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#if defined(TOSHIBA_GIGABEAT_F) || defined(TOSHIBA_GIGABEAT_S) ||\
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defined(SIMULATOR)
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/* Don't cache BRR waves */
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#define SPC_BRRCACHE 0
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/* Allow gaussian interpolation */
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#define SPC_NOINTERP 0
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/* Allow echo processing */
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#define SPC_NOECHO 0
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#elif defined(CPU_COLDFIRE)
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/* Cache BRR waves */
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#define SPC_BRRCACHE 1
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/* Disable gaussian interpolation */
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#define SPC_NOINTERP 1
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/* Allow echo processing */
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#define SPC_NOECHO 0
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#elif defined (CPU_PP) && SPC_DUAL_CORE
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/* Cache BRR waves */
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#define SPC_BRRCACHE 1
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/* Disable gaussian interpolation */
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#define SPC_NOINTERP 1
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/* Allow echo processing */
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#define SPC_NOECHO 0
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#else
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/* Cache BRR waves */
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#define SPC_BRRCACHE 1
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/* Disable gaussian interpolation */
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#define SPC_NOINTERP 1
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/* Disable echo processing */
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#define SPC_NOECHO 1
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#endif
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#ifdef CPU_ARM
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#if CONFIG_CPU != PP5002
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#undef ICODE_ATTR
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#define ICODE_ATTR
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#undef IDATA_ATTR
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#define IDATA_ATTR
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#undef ICONST_ATTR
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#define ICONST_ATTR
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#undef IBSS_ATTR
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#define IBSS_ATTR
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#endif
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#if SPC_DUAL_CORE
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#undef SHAREDBSS_ATTR
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#define SHAREDBSS_ATTR __attribute__ ((section(".ibss")))
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#undef SHAREDDATA_ATTR
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#define SHAREDDATA_ATTR __attribute__((section(".idata")))
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#endif
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#endif
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/* Samples per channel per iteration */
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#if defined(CPU_PP) && NUM_CORES == 1
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#define WAV_CHUNK_SIZE 2048
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#else
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#define WAV_CHUNK_SIZE 1024
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#endif
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/**************** Little-endian handling ****************/
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static inline unsigned get_le16( void const* p )
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{
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return ((unsigned char const*) p) [1] * 0x100u +
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((unsigned char const*) p) [0];
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}
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static inline int get_le16s( void const* p )
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{
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return ((signed char const*) p) [1] * 0x100 +
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((unsigned char const*) p) [0];
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}
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static inline void set_le16( void* p, unsigned n )
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{
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((unsigned char*) p) [1] = (unsigned char) (n >> 8);
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((unsigned char*) p) [0] = (unsigned char) n;
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}
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#define GET_LE16( addr ) get_le16( addr )
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#define SET_LE16( addr, data ) set_le16( addr, data )
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#define INT16A( addr ) (*(uint16_t*) (addr))
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#define INT16SA( addr ) (*(int16_t*) (addr))
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#ifdef ROCKBOX_LITTLE_ENDIAN
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#define GET_LE16A( addr ) (*(uint16_t*) (addr))
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#define GET_LE16SA( addr ) (*( int16_t*) (addr))
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#define SET_LE16A( addr, data ) (void) (*(uint16_t*) (addr) = (data))
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#else
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#define GET_LE16A( addr ) get_le16 ( addr )
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#define GET_LE16SA( addr ) get_le16s( addr )
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#define SET_LE16A( addr, data ) set_le16 ( addr, data )
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#endif
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struct Spc_Emu;
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#define THIS struct Spc_Emu* const this
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/* The CPU portion (shock!) */
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struct cpu_regs_t
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{
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long pc; /* more than 16 bits to allow overflow detection */
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uint8_t a;
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uint8_t x;
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uint8_t y;
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uint8_t status;
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uint8_t sp;
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};
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struct cpu_ram_t
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{
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union {
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uint8_t padding1 [0x100];
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uint16_t align;
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} padding1 [1];
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uint8_t ram [0x10000];
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uint8_t padding2 [0x100];
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};
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#undef RAM
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#define RAM ram.ram
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extern struct cpu_ram_t ram;
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long CPU_run( THIS, long start_time ) ICODE_ATTR;
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void CPU_Init( THIS );
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/* The DSP portion (awe!) */
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enum { VOICE_COUNT = 8 };
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enum { REGISTER_COUNT = 128 };
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struct raw_voice_t
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{
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int8_t volume [2];
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uint8_t rate [2];
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uint8_t waveform;
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uint8_t adsr [2]; /* envelope rates for attack, decay, and sustain */
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uint8_t gain; /* envelope gain (if not using ADSR) */
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int8_t envx; /* current envelope level */
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int8_t outx; /* current sample */
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int8_t unused [6];
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};
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struct globals_t
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{
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int8_t unused1 [12];
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int8_t volume_0; /* 0C Main Volume Left (-.7) */
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int8_t echo_feedback; /* 0D Echo Feedback (-.7) */
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int8_t unused2 [14];
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int8_t volume_1; /* 1C Main Volume Right (-.7) */
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int8_t unused3 [15];
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int8_t echo_volume_0; /* 2C Echo Volume Left (-.7) */
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uint8_t pitch_mods; /* 2D Pitch Modulation on/off for each voice */
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int8_t unused4 [14];
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int8_t echo_volume_1; /* 3C Echo Volume Right (-.7) */
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uint8_t noise_enables; /* 3D Noise output on/off for each voice */
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int8_t unused5 [14];
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uint8_t key_ons; /* 4C Key On for each voice */
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uint8_t echo_ons; /* 4D Echo on/off for each voice */
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int8_t unused6 [14];
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uint8_t key_offs; /* 5C key off for each voice
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(instantiates release mode) */
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uint8_t wave_page; /* 5D source directory (wave table offsets) */
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int8_t unused7 [14];
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uint8_t flags; /* 6C flags and noise freq */
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uint8_t echo_page; /* 6D */
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int8_t unused8 [14];
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uint8_t wave_ended; /* 7C */
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uint8_t echo_delay; /* 7D ms >> 4 */
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char unused9 [2];
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};
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enum state_t
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{ /* -1, 0, +1 allows more efficient if statements */
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state_decay = -1,
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state_sustain = 0,
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state_attack = +1,
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state_release = 2
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};
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struct cache_entry_t
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{
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int16_t const* samples;
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unsigned end; /* past-the-end position */
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unsigned loop; /* number of samples in loop */
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unsigned start_addr;
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};
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enum { BRR_BLOCK_SIZE = 16 };
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enum { BRR_CACHE_SIZE = 0x20000 + 32} ;
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struct voice_t
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{
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#if SPC_BRRCACHE
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int16_t const* samples;
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long wave_end;
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int wave_loop;
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#else
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int16_t samples [3 + BRR_BLOCK_SIZE + 1];
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int block_header; /* header byte from current block */
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#endif
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uint8_t const* addr;
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short volume [2];
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long position;/* position in samples buffer, with 12-bit fraction */
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short envx;
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short env_mode;
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short env_timer;
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short key_on_delay;
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};
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#if SPC_BRRCACHE
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/* a little extra for samples that go past end */
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extern int16_t BRRcache [BRR_CACHE_SIZE];
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#endif
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enum { FIR_BUF_HALF = 8 };
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#if defined(CPU_COLDFIRE)
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/* global because of the large aligment requirement for hardware masking -
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* L-R interleaved 16-bit samples for easy loading and mac.w use.
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*/
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enum
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{
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FIR_BUF_CNT = FIR_BUF_HALF,
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FIR_BUF_SIZE = FIR_BUF_CNT * sizeof ( int32_t ),
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FIR_BUF_ALIGN = FIR_BUF_SIZE * 2,
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FIR_BUF_MASK = ~((FIR_BUF_ALIGN / 2) | (sizeof ( int32_t ) - 1))
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};
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#elif defined (CPU_ARM)
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enum
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{
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FIR_BUF_CNT = FIR_BUF_HALF * 2 * 2,
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FIR_BUF_SIZE = FIR_BUF_CNT * sizeof ( int32_t ),
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FIR_BUF_ALIGN = FIR_BUF_SIZE,
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FIR_BUF_MASK = ~((FIR_BUF_ALIGN / 2) | (sizeof ( int32_t ) * 2 - 1))
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};
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#endif /* CPU_* */
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struct Spc_Dsp
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{
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union
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{
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struct raw_voice_t voice [VOICE_COUNT];
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uint8_t reg [REGISTER_COUNT];
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struct globals_t g;
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int16_t align;
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} r;
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unsigned echo_pos;
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int keys_down;
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int noise_count;
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uint16_t noise; /* also read as int16_t */
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#if defined(CPU_COLDFIRE)
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/* circularly hardware masked address */
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int32_t *fir_ptr;
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/* wrapped address just behind current position -
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allows mac.w to increment and mask fir_ptr */
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int32_t *last_fir_ptr;
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/* copy of echo FIR constants as int16_t for use with mac.w */
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int16_t fir_coeff [VOICE_COUNT];
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#elif defined (CPU_ARM)
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/* fir_buf [i + 8] == fir_buf [i], to avoid wrap checking in FIR code */
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int32_t *fir_ptr;
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/* copy of echo FIR constants as int32_t, for faster access */
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int32_t fir_coeff [VOICE_COUNT];
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#else
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/* fir_buf [i + 8] == fir_buf [i], to avoid wrap checking in FIR code */
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int fir_pos; /* (0 to 7) */
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int fir_buf [FIR_BUF_HALF * 2] [2];
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/* copy of echo FIR constants as int, for faster access */
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int fir_coeff [VOICE_COUNT];
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#endif
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struct voice_t voice_state [VOICE_COUNT];
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#if SPC_BRRCACHE
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uint8_t oldsize;
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struct cache_entry_t wave_entry [256];
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struct cache_entry_t wave_entry_old [256];
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#endif
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};
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struct src_dir
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{
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char start [2];
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char loop [2];
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};
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void DSP_run_( struct Spc_Dsp* this, long count, int32_t* out_buf ) ICODE_ATTR;
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void DSP_reset( struct Spc_Dsp* this );
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static inline void DSP_run( struct Spc_Dsp* this, long count, int32_t* out )
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{
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/* Should we just fill the buffer with silence? Flags won't be cleared */
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/* during this run so it seems it should keep resetting every sample. */
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if ( this->r.g.flags & 0x80 )
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DSP_reset( this );
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DSP_run_( this, count, out );
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}
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/**************** SPC emulator ****************/
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/* 1.024 MHz clock / 32000 samples per second */
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enum { CLOCKS_PER_SAMPLE = 32 };
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enum { EXTRA_CLOCKS = CLOCKS_PER_SAMPLE / 2 };
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/* using this disables timer (since this will always be in the future) */
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enum { TIMER_DISABLED_TIME = 127 };
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enum { ROM_SIZE = 64 };
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enum { ROM_ADDR = 0xFFC0 };
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enum { TIMER_COUNT = 3 };
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struct Timer
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{
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long next_tick;
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int period;
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int count;
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int shift;
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int enabled;
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int counter;
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};
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void Timer_run_( struct Timer* t, long time ) ICODE_ATTR;
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static inline void Timer_run( struct Timer* t, long time )
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{
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if ( time >= t->next_tick )
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Timer_run_( t, time );
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}
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struct Spc_Emu
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{
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uint8_t cycle_table [0x100];
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struct cpu_regs_t r;
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int32_t* sample_buf;
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long next_dsp;
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int rom_enabled;
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int extra_cycles;
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struct Timer timer [TIMER_COUNT];
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/* large objects at end */
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struct Spc_Dsp dsp;
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uint8_t extra_ram [ROM_SIZE];
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uint8_t boot_rom [ROM_SIZE];
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};
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enum { SPC_FILE_SIZE = 0x10180 };
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struct spc_file_t
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{
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char signature [27];
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char unused [10];
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uint8_t pc [2];
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uint8_t a;
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uint8_t x;
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uint8_t y;
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uint8_t status;
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uint8_t sp;
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char unused2 [212];
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uint8_t ram [0x10000];
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uint8_t dsp [128];
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uint8_t ipl_rom [128];
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};
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void SPC_Init( THIS );
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int SPC_load_spc( THIS, const void* data, long size );
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/**************** DSP interaction ****************/
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void DSP_write( struct Spc_Dsp* this, int i, int data ) ICODE_ATTR;
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static inline int DSP_read( struct Spc_Dsp* this, int i )
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{
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assert( (unsigned) i < REGISTER_COUNT );
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return this->r.reg [i];
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}
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void SPC_run_dsp_( THIS, long time ) ICODE_ATTR;
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static inline void SPC_run_dsp( THIS, long time )
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{
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if ( time >= this->next_dsp )
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SPC_run_dsp_( this, time );
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}
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int SPC_read( THIS, unsigned addr, long const time ) ICODE_ATTR;
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void SPC_write( THIS, unsigned addr, int data, long const time ) ICODE_ATTR;
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/**************** Sample generation ****************/
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int SPC_play( THIS, long count, int32_t* out ) ICODE_ATTR;
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#endif /* _SPC_CODEC_H_ */
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