forked from len0rd/rockbox
Gigabeat S: Implement LCD contrast, invert and flip modes. Enhance LCD power management. Include init data but it's not needed yet (identical to Gigabeat F).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26154 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis
parent
4c6164fece
commit
54c649697b
5 changed files with 307 additions and 54 deletions
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@ -22,7 +22,10 @@
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#include "inttypes.h"
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#include "config.h"
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#include "system.h"
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#include "cpu.h"
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#include "spi-imx31.h"
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#include "mc13783.h"
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#include "string.h"
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#include "lcd.h"
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#include "kernel.h"
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@ -32,16 +35,117 @@
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#define MAIN_LCD_IDMAC_CHANNEL 14
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#define LCDADDR(x, y) (&lcd_framebuffer[(y)][(x)])
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static bool lcd_on = true;
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static bool lcd_powered = true;
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static unsigned lcd_yuv_options = 0;
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/* Copies a rectangle from one framebuffer to another. Can be used in
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single transfer mode with width = num pixels, and height = 1 which
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allows a full-width rectangle to be copied more efficiently. */
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extern void lcd_copy_buffer_rect(fb_data *dst, const fb_data *src,
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int width, int height);
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static bool lcd_on = true;
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static bool lcd_powered = true;
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static unsigned lcd_yuv_options = 0;
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#if 0
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/* Initialization data from OF bootloader. Identical to Gigabeat F/X. */
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static const unsigned char lcd_init_data[50] =
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{
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/* Reg Val */
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0x0f, 0x01,
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0x09, 0x06,
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0x16, 0xa6,
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0x1e, 0x49,
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0x1f, 0x26,
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0x0b, 0x2f, /* Set contrast 0-63 */
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0x0c, 0x2b,
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0x19, 0x5e,
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0x1a, 0x15,
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0x1b, 0x15,
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0x1d, 0x01,
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0x00, 0x03,
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0x01, 0x10,
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0x02, 0x0a,
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0x06, 0x04, /* Set the orientation 2=upside down, 4=normal */
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0x08, 0x2e,
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0x24, 0x12,
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0x25, 0x3f,
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0x26, 0x0b,
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0x27, 0x00,
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0x28, 0x00,
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0x29, 0xf6,
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0x2a, 0x03,
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0x2b, 0x0a,
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0x04, 0x01, /* Display ON */
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};
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#endif
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static const struct spi_node lcd_spi_node =
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{
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/* Original firmware settings for LCD panel commication */
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CSPI3_NUM, /* CSPI module 3 */
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CSPI_CONREG_CHIP_SELECT_SS1 | /* Chip select 1 */
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CSPI_CONREG_DRCTL_DONT_CARE | /* Don't care about CSPI_RDY */
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CSPI_CONREG_DATA_RATE_DIV_16 | /* Clock = IPG_CLK/16 = 4,125,000Hz. */
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CSPI_BITCOUNT(32-1) | /* All 32 bits are to be transferred */
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CSPI_CONREG_SSPOL | /* SS active high */
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CSPI_CONREG_PHA | /* Phase 1 operation */
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CSPI_CONREG_POL | /* Active low polarity */
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CSPI_CONREG_MODE, /* Master mode */
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0, /* SPI clock - no wait states */
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};
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static void lcd_write_reg(unsigned reg, unsigned val)
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{
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/* packet: |00|rr|01|vv| */
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uint32_t packet = ((reg & 0xff) << 16) | 0x0100 | (val & 0xff);
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struct spi_transfer_desc xfer;
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xfer.node = &lcd_spi_node;
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xfer.txbuf = &packet;
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xfer.rxbuf = NULL;
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xfer.count = 1;
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xfer.callback = NULL;
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xfer.next = NULL;
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if (spi_transfer(&xfer))
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{
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/* Just busy wait; the interface is not used very much */
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while (!spi_transfer_complete(&xfer));
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}
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}
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static void lcd_enable_interface(bool enable)
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{
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if (enable)
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{
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spi_enable_module(&lcd_spi_node);
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}
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else
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{
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spi_disable_module(&lcd_spi_node);
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}
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}
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static void lcd_set_power(bool powered)
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{
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if (powered)
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{
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lcd_powered = false;
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lcd_write_reg(0x04, 0x00);
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lcd_enable_interface(false);
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imx31_regclr32(&GPIO3_DR, (1 << 12));
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mc13783_clear(MC13783_REGULATOR_MODE1, MC13783_VCAMEN);
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}
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else
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{
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mc13783_set(MC13783_REGULATOR_MODE1, MC13783_VCAMEN);
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imx31_regset32(&GPIO3_DR, (1 << 12));
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lcd_enable_interface(true);
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lcd_write_reg(0x04, 0x01);
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lcd_powered = true;
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}
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}
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/* LCD init */
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void lcd_init_device(void)
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{
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@ -50,8 +154,19 @@ void lcd_init_device(void)
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/* Only do this once to avoid flicker */
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memset(FRAME, 0x00, FRAME_SIZE);
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#endif
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IPU_IMA_ADDR = ((0x1 << 16) | (MAIN_LCD_IDMAC_CHANNEL << 4)) + (1 << 3);
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IPU_IMA_DATA = FRAME_PHYS_ADDR;
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IPU_IPU_IMA_ADDR = ((0x1 << 16) | (MAIN_LCD_IDMAC_CHANNEL << 4)) + (1 << 3);
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IPU_IPU_IMA_DATA = FRAME_PHYS_ADDR;
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lcd_enable_interface(true);
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#ifdef HAVE_LCD_CONTRAST
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lcd_set_contrast(DEFAULT_CONTRAST_SETTING);
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#endif
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#ifdef HAVE_LCD_INVERT
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lcd_set_invert_display(false);
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#endif
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#ifdef HAVE_LCD_FLIP
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lcd_set_flip(false);
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#endif
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}
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/* Update a fraction of the display. */
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@ -96,13 +211,14 @@ void lcd_update_rect(int x, int y, int width, int height)
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void lcd_sleep(void)
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{
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if (lcd_powered)
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{
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lcd_enable(false);
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lcd_powered = false;
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IPU_IDMAC_CHA_EN &= ~(1ul << MAIN_LCD_IDMAC_CHANNEL);
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_backlight_lcd_sleep();
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}
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if (!lcd_powered)
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return;
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IPU_IDMAC_CHA_EN &= ~(1ul << MAIN_LCD_IDMAC_CHANNEL);
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IPU_IPU_CONF &= ~IPU_IPU_CONF_ADC_EN;
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lcd_enable(false);
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lcd_set_power(false);
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_backlight_lcd_sleep();
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}
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void lcd_enable(bool state)
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@ -112,9 +228,11 @@ void lcd_enable(bool state)
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if (state)
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{
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if (!lcd_powered)
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lcd_set_power(true);
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IPU_IPU_CONF |= IPU_IPU_CONF_ADC_EN;
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IPU_IDMAC_CHA_EN |= 1ul << MAIN_LCD_IDMAC_CHANNEL;
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sleep(HZ/50);
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lcd_powered = true;
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lcd_on = true;
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lcd_update();
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send_event(LCD_EVENT_ACTIVATION, NULL);
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@ -211,18 +329,37 @@ void lcd_blit_yuv(unsigned char * const src[3],
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}
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}
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void lcd_set_contrast(int val) {
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(void) val;
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// TODO:
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#ifdef HAVE_LCD_CONTRAST
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void lcd_set_contrast(int val)
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{
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if (!lcd_on)
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return;
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lcd_write_reg(0x0b, val);
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}
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void lcd_set_invert_display(bool yesno) {
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(void) yesno;
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// TODO:
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int lcd_default_contrast(void)
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{
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return DEFAULT_CONTRAST_SETTING;
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}
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#endif /* HAVE_LCD_CONTRAST */
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void lcd_set_flip(bool yesno) {
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(void) yesno;
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// TODO:
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#ifdef HAVE_LCD_INVERT
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void lcd_set_invert_display(bool yesno)
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{
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if (!lcd_on)
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return;
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lcd_write_reg(0x27, yesno ? 0x10 : 00);
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}
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#endif /* HAVE_LCD_INVERT */
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#ifdef HAVE_LCD_FLIP
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void lcd_set_flip(bool yesno)
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{
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if (!lcd_on)
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return;
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lcd_write_reg(0x06, yesno ? 0x02 : 0x04);
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}
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#endif /* HAVE_LCD_FLIP */
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@ -435,3 +435,9 @@ bool spi_transfer(struct spi_transfer_desc *xfer)
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return retval;
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}
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/* Returns 'true' if the descriptor is not busy */
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bool spi_transfer_complete(const struct spi_transfer_desc *xfer)
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{
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return xfer->next == NULL;
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}
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@ -83,4 +83,7 @@ void spi_disable_module(const struct spi_node *node);
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/* Send and/or receive data on the specified node (asychronous) */
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bool spi_transfer(struct spi_transfer_desc *xfer);
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/* Returns 'true' if the descriptor is not busy */
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bool spi_transfer_complete(const struct spi_transfer_desc *xfer);
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#endif /* SPI_IMX31_H */
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