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jz4760: Dial down PIXCLK as low as possible

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We don't use it on the X3.  Should we ever get another jz4760 target
we can revisit this.

Change-Id: I591d02c7e47b35424b3c96b776b31a38e3c8ceee
This commit is contained in:
Solomon Peachy 2020-09-02 13:31:55 -04:00
parent f913829d06
commit 546212a977
1 changed files with 3 additions and 0 deletions
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firmware/target/mips/ingenic_jz47xx/system-jz4760.c
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@ -503,6 +503,9 @@ static void pll0_init(unsigned int freq)
/* Init MSC clock; shoot for 48MHz base clock. */ /* Init MSC clock; shoot for 48MHz base clock. */
REG_CPM_MSCCDR = MSCCDR_MCS | ((freq / 48000000) - 1); REG_CPM_MSCCDR = MSCCDR_MCS | ((freq / 48000000) - 1);
/* Clock LCD clock as low as possible here */
__cpm_set_pixdiv(2048 -1);
/* init PLL */ /* init PLL */
REG_CPM_CPCCR = cfcr; REG_CPM_CPCCR = cfcr;
REG_CPM_CPPCR0 = plcr1; REG_CPM_CPPCR0 = plcr1;