forked from len0rd/rockbox
PortalPlayer: Loading of stack munge value into r4 was moved in r30741 to after the idle stack init loop, breaking the usage readout.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31068 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
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a99d9eca0b
commit
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1 changed files with 17 additions and 17 deletions
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@ -26,7 +26,7 @@
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.global start
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.global start
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start:
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start:
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/* PortalPlayer bootloader and startup code based on startup.s from the iPodLinux
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/* PortalPlayer bootloader and startup code based on startup.s from the iPodLinux
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* loader
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* loader
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*
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*
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* Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org)
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* Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org)
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@ -65,7 +65,7 @@ start:
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.equ SLEEP, 0x80000000
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.equ SLEEP, 0x80000000
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.equ WAKE, 0x00000000
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.equ WAKE, 0x00000000
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.equ CPUSLEEPING, 0x80000000
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.equ CPUSLEEPING, 0x80000000
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.equ COPSLEEPING, 0x80000000
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.equ COPSLEEPING, 0x80000000
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.equ CACHE_CTRL, 0x6000c000
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.equ CACHE_CTRL, 0x6000c000
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.equ MMAP_LOG, 0xf000f000 /* MMAP0 */
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.equ MMAP_LOG, 0xf000f000 /* MMAP0 */
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.equ MMAP_PHYS, 0xf000f004
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.equ MMAP_PHYS, 0xf000f004
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@ -90,7 +90,7 @@ start:
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pad_skip:
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pad_skip:
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/* Find out which processor we are - r0 should be preserved for the
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/* Find out which processor we are - r0 should be preserved for the
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* duration of the init to avoid constant reloading of the processor ID.
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* duration of the init to avoid constant reloading of the processor ID.
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* For each stage, CPU proceeds first, then COP.
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* For each stage, CPU proceeds first, then COP.
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*/
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*/
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ldr r0, =PROC_ID
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ldr r0, =PROC_ID
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ldrb r0, [r0]
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ldrb r0, [r0]
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@ -109,10 +109,10 @@ pad_skip:
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and wait for the COP to finish. This ensures no threading activity
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and wait for the COP to finish. This ensures no threading activity
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starts until it is safe. */
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starts until it is safe. */
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cmp r0, #0x55
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cmp r0, #0x55
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/* mask all interrupt sources before setting anything up */
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/* mask all interrupt sources before setting anything up */
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ldreq r2, =CPU_ICLR
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ldreq r2, =CPU_ICLR
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ldrne r2, =COP_ICLR
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ldrne r2, =COP_ICLR
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mvn r1, #0
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mvn r1, #0
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str r1, [r2]
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str r1, [r2]
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@ -175,7 +175,7 @@ pad_skip:
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ldr r3, =MMAP_PHYS
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ldr r3, =MMAP_PHYS
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ldr r2, =MMAP_MASK /* ldr is more flexible */
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ldr r2, =MMAP_MASK /* ldr is more flexible */
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ldr r1, =MMAP_LOG
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ldr r1, =MMAP_LOG
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mov pc, #0x40000000
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mov pc, #0x40000000
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remap_start:
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remap_start:
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str r2, [r1]
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str r2, [r1]
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@ -207,7 +207,7 @@ cpu_init:
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ldr r3, [r4]
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ldr r3, [r4]
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tst r3, #COPSLEEPING
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tst r3, #COPSLEEPING
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beq 1b
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beq 1b
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/* Vectors and IRAM copy is done first since they are reclaimed for
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/* Vectors and IRAM copy is done first since they are reclaimed for
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* other uninitialized sections */
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* other uninitialized sections */
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@ -220,7 +220,7 @@ cpu_init:
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ldrhi r5, [r4], #4
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ldrhi r5, [r4], #4
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strhi r5, [r2], #4
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strhi r5, [r2], #4
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bhi 1b
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bhi 1b
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/* Copy the IRAM */
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/* Copy the IRAM */
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ldr r2, =_iramcopy
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ldr r2, =_iramcopy
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ldr r3, =_iramstart
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ldr r3, =_iramstart
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@ -262,6 +262,9 @@ cpu_init:
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strhi r4, [r2], #4
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strhi r4, [r2], #4
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bhi 1b
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bhi 1b
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/* Load stack munge value */
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ldr r4, =0xdeadbeef
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#if NUM_CORES > 1
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#if NUM_CORES > 1
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/* Set up idle stack and munge it with 0xdeadbeef */
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/* Set up idle stack and munge it with 0xdeadbeef */
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ldr r2, =cpu_idlestackbegin
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ldr r2, =cpu_idlestackbegin
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@ -272,10 +275,10 @@ cpu_init:
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bhi 1b
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bhi 1b
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#endif
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#endif
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/* Set up stack for IRQ mode */
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/* Set up stack for IRQ mode */
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msr cpsr_c, #0x92 /* IRQ disabled, FIQ enabled */
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msr cpsr_c, #0x92 /* IRQ disabled, FIQ enabled */
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ldr sp, =irq_stack
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ldr sp, =irq_stack
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/* Set up stack for FIQ mode */
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/* Set up stack for FIQ mode */
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msr cpsr_c, #0xd1 /* IRQ/FIQ disabled */
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msr cpsr_c, #0xd1 /* IRQ/FIQ disabled */
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ldr sp, =fiq_stack
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ldr sp, =fiq_stack
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@ -290,9 +293,6 @@ cpu_init:
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/* Switch to sys mode */
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/* Switch to sys mode */
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msr cpsr_c, #0xdf
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msr cpsr_c, #0xdf
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/* Load stack munge value */
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ldr r4, =0xdeadbeef
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/* Set up some stack and munge it with 0xdeadbeef */
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/* Set up some stack and munge it with 0xdeadbeef */
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ldr r2, =stackbegin
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ldr r2, =stackbegin
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ldr sp, =stackend
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ldr sp, =stackend
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@ -349,7 +349,7 @@ cop_init:
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cmp sp, r2
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cmp sp, r2
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strhi r4, [r2], #4
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strhi r4, [r2], #4
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bhi 2b
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bhi 2b
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/* Run cop_main() in apps/main.c */
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/* Run cop_main() in apps/main.c */
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ldr pc, =cop_main
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ldr pc, =cop_main
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@ -367,7 +367,7 @@ cop_init:
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/* Exception vectors */
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/* Exception vectors */
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.global vectors
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.global vectors
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vectors:
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vectors:
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.word start
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.word start
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.word undef_instr_handler
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.word undef_instr_handler
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.word software_int_handler
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.word software_int_handler
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.word prefetch_abort_handler
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.word prefetch_abort_handler
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@ -403,13 +403,13 @@ prefetch_abort_handler:
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b UIE
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b UIE
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data_abort_handler:
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data_abort_handler:
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sub r0, lr, #8
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sub r0, lr, #8
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mov r1, #2
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mov r1, #2
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b UIE
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b UIE
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/* Align stacks to cache line boundary */
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/* Align stacks to cache line boundary */
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.balign 32
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.balign 32
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/* 256 words of IRQ stack */
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/* 256 words of IRQ stack */
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.space 256*4
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.space 256*4
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irq_stack:
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irq_stack:
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