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iPod Classic: Enable boosting by switching the CPU between 1x and 2x AHB clock

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29265 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sparmann 2011-02-09 21:45:57 +00:00
parent acf54bed55
commit 44870b7415
6 changed files with 30 additions and 16 deletions
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5
firmware/export/config/ipod6g.h
View file

@ -168,10 +168,9 @@
#define HAVE_USB_CHARGING_ENABLE #define HAVE_USB_CHARGING_ENABLE
/* The size of the flash ROM */ /* The size of the flash ROM */
#define FLASH_SIZE 0x400000 #define FLASH_SIZE 0x1000000
/* Define this to the CPU frequency */ /* Define this to the CPU frequency */
//TODO: Figure out exact value
#define CPU_FREQ 216000000 #define CPU_FREQ 216000000
/* define this if the hardware can be powered off while charging */ /* define this if the hardware can be powered off while charging */
@ -195,7 +194,7 @@
#define MAX_PHYS_SECTOR_SIZE 4096 #define MAX_PHYS_SECTOR_SIZE 4096
/* Define this if you have adjustable CPU frequency */ /* Define this if you have adjustable CPU frequency */
//TODO: #define HAVE_ADJUSTABLE_CPU_FREQ #define HAVE_ADJUSTABLE_CPU_FREQ
#define BOOTFILE_EXT "ipod" #define BOOTFILE_EXT "ipod"
#define BOOTFILE "rockbox." BOOTFILE_EXT #define BOOTFILE "rockbox." BOOTFILE_EXT

20
firmware/export/s5l8702.h
View file

@ -28,8 +28,7 @@
#define REG16_PTR_T volatile uint16_t * #define REG16_PTR_T volatile uint16_t *
#define REG32_PTR_T volatile uint32_t * #define REG32_PTR_T volatile uint32_t *
//TODO: Figure out exact value #define TIMER_FREQ 54000000
#define TIMER_FREQ 216000000
#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ #define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
@ -42,8 +41,21 @@
#define TTB_SIZE 0x4000 #define TTB_SIZE 0x4000
#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE) #define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE)
/////SYSCON///// /////SYSTEM CONTROLLER/////
#define CLKCON0C (*((uint32_t volatile*)(0x3C50000C))) #define CLKCON0 (*((volatile uint32_t*)(0x3C500000)))
#define CLKCON1 (*((volatile uint32_t*)(0x3C500004)))
#define CLKCON2 (*((volatile uint32_t*)(0x3C500008)))
#define CLKCON3 (*((volatile uint32_t*)(0x3C50000C)))
#define CLKCON4 (*((volatile uint32_t*)(0x3C500010)))
#define CLKCON5 (*((volatile uint32_t*)(0x3C500014)))
#define PLL0PMS (*((volatile uint32_t*)(0x3C500020)))
#define PLL1PMS (*((volatile uint32_t*)(0x3C500024)))
#define PLL2PMS (*((volatile uint32_t*)(0x3C500028)))
#define PLL0LCNT (*((volatile uint32_t*)(0x3C500030)))
#define PLL1LCNT (*((volatile uint32_t*)(0x3C500034)))
#define PLL2LCNT (*((volatile uint32_t*)(0x3C500038)))
#define PLLLOCK (*((volatile uint32_t*)(0x3C500040)))
#define PLLMODE (*((volatile uint32_t*)(0x3C500044)))
#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \ #define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \
+ ((i) == 4 ? 0x6C : \ + ((i) == 4 ? 0x6C : \
((i) == 3 ? 0x68 : \ ((i) == 3 ? 0x68 : \

4
firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c
View file

@ -59,6 +59,6 @@ void cscodec_reset(bool state)
void cscodec_clock(bool state) void cscodec_clock(bool state)
{ {
if (state) CLKCON0C &= ~0xffff; if (state) CLKCON3 &= ~0xffff;
else CLKCON0C |= 0x8000; else CLKCON3 |= 0x8000;
} }

1
firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
View file

@ -79,6 +79,7 @@ int pmu_read_battery_voltage(void)
/* milliamps */ /* milliamps */
int pmu_read_battery_current(void) int pmu_read_battery_current(void)
{ {
//TODO: Figure out how to read the battery current
// return pmu_read_adc(2); // return pmu_read_adc(2);
return 0; return 0;
} }

7
firmware/target/arm/s5l8702/system-s5l8702.c
View file

@ -253,13 +253,16 @@ void set_cpu_frequency(long frequency)
if (cpu_frequency == frequency) if (cpu_frequency == frequency)
return; return;
//TODO: Need to understand this better
if (frequency == CPUFREQ_MAX) if (frequency == CPUFREQ_MAX)
{ {
//TODO: Figure out and implement CLKCON0 = 0x3011;
CLKCON1 = 0x4001;
} }
else else
{ {
//TODO: Figure out and implement CLKCON1 = 0x404101;
CLKCON0 = 0x3000;
} }
cpu_frequency = frequency; cpu_frequency = frequency;

5
firmware/target/arm/s5l8702/system-target.h
View file

@ -24,11 +24,10 @@
#include "system-arm.h" #include "system-arm.h"
#include "mmu-arm.h" #include "mmu-arm.h"
//TODO: Figure out exact values
#define CPUFREQ_SLEEP 32768 #define CPUFREQ_SLEEP 32768
#define CPUFREQ_MAX 216000000 #define CPUFREQ_MAX 216000000
#define CPUFREQ_DEFAULT 216000000 #define CPUFREQ_DEFAULT 108000000
#define CPUFREQ_NORMAL 216000000 #define CPUFREQ_NORMAL 108000000
#define STORAGE_WANTS_ALIGN #define STORAGE_WANTS_ALIGN