forked from len0rd/rockbox
Code police raid
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15717 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Linus Nielsen Feltzing
parent
4c4c9f27b6
commit
3e192a616d
1 changed files with 102 additions and 96 deletions
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@ -25,123 +25,129 @@
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/* A "DSP image" is an array of these, terminated by raw_data_size_half = 0. */
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struct dsp_section {
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const unsigned short *raw_data;
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unsigned short physical_addr;
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unsigned short raw_data_size_half;
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const unsigned short *raw_data;
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unsigned short physical_addr;
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unsigned short raw_data_size_half;
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};
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/* Must define struct dsp_section before including the image. */
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#include "dsp_image_helloworld.h"
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#ifdef DEBUG
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static void dsp_status(void) {
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unsigned short hpib_ctl = IO_DSPC_HPIB_CONTROL;
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unsigned short hpib_stat = IO_DSPC_HPIB_STATUS;
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char buffer1[80], buffer2[80];
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static void dsp_status(void)
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{
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unsigned short hpib_ctl = IO_DSPC_HPIB_CONTROL;
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unsigned short hpib_stat = IO_DSPC_HPIB_STATUS;
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char buffer1[80], buffer2[80];
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DEBUGF("dsp_status(): clkc_hpib=%u clkc_dsp=%u",
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!!(IO_CLK_MOD0 & (1 << 11)), !!(IO_CLK_MOD0 & (1 << 10)));
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DEBUGF("dsp_status(): irq_dsphint=%u 7fff=%04x scratch_status=%04x"
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" acked=%04x",
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(IO_INTC_IRQ0 >> IRQ_DSPHINT) & 1, DSP_(0x7fff), DSP_(_status),
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DSP_(_acked));
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DEBUGF("dsp_status(): clkc_hpib=%u clkc_dsp=%u",
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!!(IO_CLK_MOD0 & (1 << 11)), !!(IO_CLK_MOD0 & (1 << 10)));
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DEBUGF("dsp_status(): irq_dsphint=%u 7fff=%04x scratch_status=%04x"
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" acked=%04x",
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(IO_INTC_IRQ0 >> IRQ_DSPHINT) & 1, DSP_(0x7fff), DSP_(_status),
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DSP_(_acked));
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#define B(f,w,b,m) if ((w & (1 << b)) == 0) \
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strcat(f, "!"); \
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strcat(f, #m "|");
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strcpy(buffer1, "");
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B(buffer1, hpib_ctl, 0, EN);
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B(buffer1, hpib_ctl, 3, NMI);
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B(buffer1, hpib_ctl, 5, EXCHG);
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B(buffer1, hpib_ctl, 7, DINT0);
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B(buffer1, hpib_ctl, 8, DRST);
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B(buffer1, hpib_ctl, 9, DHOLD);
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B(buffer1, hpib_ctl, 10, BIO);
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strcpy(buffer2, "");
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B(buffer2, hpib_stat, 8, HOLDA);
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B(buffer2, hpib_stat, 12, DXF);
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DEBUGF("dsp_status(): hpib: ctl=%s stat=%s", buffer1, buffer2);
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strcpy(buffer1, "");
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B(buffer1, hpib_ctl, 0, EN);
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B(buffer1, hpib_ctl, 3, NMI);
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B(buffer1, hpib_ctl, 5, EXCHG);
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B(buffer1, hpib_ctl, 7, DINT0);
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B(buffer1, hpib_ctl, 8, DRST);
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B(buffer1, hpib_ctl, 9, DHOLD);
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B(buffer1, hpib_ctl, 10, BIO);
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strcpy(buffer2, "");
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B(buffer2, hpib_stat, 8, HOLDA);
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B(buffer2, hpib_stat, 12, DXF);
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DEBUGF("dsp_status(): hpib: ctl=%s stat=%s", buffer1, buffer2);
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#undef B
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}
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#endif
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static void dsp_reset(void) {
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DSP_(0x7fff) = 0xdead;
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static void dsp_reset(void)
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{
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DSP_(0x7fff) = 0xdead;
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IO_DSPC_HPIB_CONTROL &= ~(1 << 8);
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/* HPIB bus cycles will lock up the ARM in here. Don't touch DSP RAM. */
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nop; nop;
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IO_DSPC_HPIB_CONTROL |= 1 << 8;
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/* TODO: Timeout. */
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while (DSP_(0x7fff) != 0);
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IO_DSPC_HPIB_CONTROL &= ~(1 << 8);
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/* HPIB bus cycles will lock up the ARM in here. Don't touch DSP RAM. */
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nop; nop;
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IO_DSPC_HPIB_CONTROL |= 1 << 8;
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/* TODO: Timeout. */
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while (DSP_(0x7fff) != 0);
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}
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void dsp_wake(void) {
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/* If this is called concurrently, we may overlap setting and resetting the
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bit, which causes lost interrupts to the DSP. */
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int old_level = set_irq_level(IRQ_DISABLED);
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/* The first time you INT0 the DSP, the ROM loader will branch to your RST
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handler. Subsequent times, your INT0 handler will get executed. */
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IO_DSPC_HPIB_CONTROL &= ~(1 << 7);
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nop; nop;
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IO_DSPC_HPIB_CONTROL |= 1 << 7;
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set_irq_level(old_level);
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void dsp_wake(void)
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{
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/* If this is called concurrently, we may overlap setting and resetting the
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bit, which causes lost interrupts to the DSP. */
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int old_level = set_irq_level(IRQ_DISABLED);
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/* The first time you INT0 the DSP, the ROM loader will branch to your RST
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handler. Subsequent times, your INT0 handler will get executed. */
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IO_DSPC_HPIB_CONTROL &= ~(1 << 7);
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nop; nop;
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IO_DSPC_HPIB_CONTROL |= 1 << 7;
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set_irq_level(old_level);
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}
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static void dsp_load(const struct dsp_section *im) {
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while (im->raw_data_size_half) {
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volatile unsigned short *data_ptr = &DSP_(im->physical_addr);
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unsigned int i;
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/* Use 16-bit writes. */
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if (im->raw_data) {
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DEBUGF("dsp_load(): loading %u words at 0x%04x (0x%08lx)",
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im->raw_data_size_half, im->physical_addr,
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(unsigned long)data_ptr);
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for (i = 0; i < im->raw_data_size_half; i++) {
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data_ptr[i] = im->raw_data[i];
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}
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} else {
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DEBUGF("dsp_load(): clearing %u words at 0x%04x (0x%08lx)",
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im->raw_data_size_half, im->physical_addr,
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(unsigned long)data_ptr);
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for (i = 0; i < im->raw_data_size_half; i++) {
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data_ptr[i] = 0;
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}
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}
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im++;
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}
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static void dsp_load(const struct dsp_section *im)
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{
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while (im->raw_data_size_half) {
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volatile unsigned short *data_ptr = &DSP_(im->physical_addr);
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unsigned int i;
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/* Use 16-bit writes. */
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if (im->raw_data) {
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DEBUGF("dsp_load(): loading %u words at 0x%04x (0x%08lx)",
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im->raw_data_size_half, im->physical_addr,
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(unsigned long)data_ptr);
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for (i = 0; i < im->raw_data_size_half; i++) {
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data_ptr[i] = im->raw_data[i];
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}
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} else {
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DEBUGF("dsp_load(): clearing %u words at 0x%04x (0x%08lx)",
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im->raw_data_size_half, im->physical_addr,
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(unsigned long)data_ptr);
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for (i = 0; i < im->raw_data_size_half; i++) {
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data_ptr[i] = 0;
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}
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}
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im++;
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}
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}
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void dsp_init(void) {
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IO_INTC_IRQ0 = 1 << 11;
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IO_INTC_EINT0 |= 1 << 11;
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dsp_reset();
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dsp_load(dsp_image_helloworld);
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void dsp_init(void)
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{
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IO_INTC_IRQ0 = 1 << 11;
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IO_INTC_EINT0 |= 1 << 11;
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dsp_reset();
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dsp_load(dsp_image_helloworld);
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}
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void DSPHINT(void) {
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unsigned int i;
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char buffer[80];
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IO_INTC_IRQ0 = 1 << 11;
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/* DSP stores one character per word. */
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for (i = 0; i < sizeof(buffer); i++) {
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buffer[i] = (&DSP_(_status))[i];
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}
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/* Release shared area to DSP. */
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dsp_wake();
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DEBUGF("DSP: %s", buffer);
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void DSPHINT(void)
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{
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unsigned int i;
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char buffer[80];
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IO_INTC_IRQ0 = 1 << 11;
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/* DSP stores one character per word. */
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for (i = 0; i < sizeof(buffer); i++) {
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buffer[i] = (&DSP_(_status))[i];
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}
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/* Release shared area to DSP. */
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dsp_wake();
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DEBUGF("DSP: %s", buffer);
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}
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