forked from len0rd/rockbox
fuze+: use mdelay and not udelay in lcd sequences
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29816 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
parent
069567c0bc
commit
3ce7809a84
1 changed files with 35 additions and 34 deletions
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@ -152,40 +152,41 @@ static void setup_lcdif_clock(void)
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imx233_enable_clock(CLK_PIX, true);
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}
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static uint32_t i80_write_read_single(uint32_t data_out)
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static uint32_t i80_read_register(uint32_t data_out)
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{
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/* lcd_enable is mapped to the RD pin of the controller */
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imx233_set_gpio_output(1, 21, true); /* lcd_cs */
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imx233_set_gpio_output(1, 19, true); /* lcd_rs */
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imx233_set_gpio_output(1, 23, true); /* lcd_enable */
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imx233_set_gpio_output(1, 20, true); /* lcd_wr */
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imx233_enable_gpio_output_mask(1, 0x3ffff, true); /* lcd_d{0-17} */
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udelay(2);
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mdelay(2);
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imx233_set_gpio_output(1, 19, false); /* lcd_rs */
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udelay(1);
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mdelay(1);
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imx233_set_gpio_output(1, 21, false); /* lcd_cs */
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udelay(1);
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mdelay(1);
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imx233_set_gpio_output(1, 20, false); /* lcd_wr */
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udelay(1);
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mdelay(1);
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imx233_set_gpio_output_mask(1, data_out & 0x3ffff, true); /* lcd_d{0-17} */
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udelay(1);
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mdelay(1);
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imx233_set_gpio_output(1, 20, true); /* lcd_wr */
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udelay(3);
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mdelay(3);
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imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */
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udelay(2);
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mdelay(2);
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imx233_set_gpio_output(1, 23, false); /* lcd_enable */
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udelay(1);
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mdelay(1);
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imx233_set_gpio_output(1, 19, true); /* lcd_rs */
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udelay(1);
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mdelay(1);
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imx233_set_gpio_output(1, 23, true); /* lcd_enable */
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udelay(3);
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mdelay(3);
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imx233_set_gpio_output(1, 23, false); /* lcd_enable */
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udelay(2);
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mdelay(2);
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uint32_t data_in = imx233_get_gpio_input_mask(1, 0x3ffff); /* lcd_d{0-17} */
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udelay(1);
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mdelay(1);
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imx233_set_gpio_output(1, 23, true); /* lcd_enable */
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udelay(1);
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mdelay(1);
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imx233_set_gpio_output(1, 21, true); /* lcd_cs */
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udelay(1);
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mdelay(1);
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return data_in;
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}
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@ -205,7 +206,7 @@ static void lcd_write_reg(uint32_t reg, uint32_t data)
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static uint32_t lcd_read_reg(uint32_t reg)
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{
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setup_lcd_pins_i80(true);
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uint32_t data_in = i80_write_read_single(encode_16_to_18(reg));
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uint32_t data_in = i80_read_register(encode_16_to_18(reg));
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setup_lcd_pins_i80(false);
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lcd_write_reg(0x22, 0);
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return decode_18_to_16(data_in);
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@ -214,11 +215,11 @@ static uint32_t lcd_read_reg(uint32_t reg)
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static void lcd_init_seq_7783(void)
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{
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__REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
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udelay(50);
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mdelay(50);
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__REG_CLR(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
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udelay(10);
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mdelay(10);
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__REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
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udelay(200);
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mdelay(200);
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lcd_write_reg(1, 0x100);
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lcd_write_reg(2, 0x700);
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lcd_write_reg(3, 0x1030);
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@ -230,15 +231,15 @@ static void lcd_init_seq_7783(void)
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lcd_write_reg(0x11, 5);
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lcd_write_reg(0x12, 0);
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lcd_write_reg(0x13, 0);
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udelay(100);
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mdelay(100);
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lcd_write_reg(0x10, 0x12b0);
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udelay(100);
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mdelay(100);
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lcd_write_reg(0x11, 7);
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udelay(100);
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mdelay(100);
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lcd_write_reg(0x12, 0x89);
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lcd_write_reg(0x13, 0x1d00);
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lcd_write_reg(0x29, 0x2f);
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udelay(50);
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mdelay(50);
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lcd_write_reg(0x30, 0);
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lcd_write_reg(0x31, 0x505);
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lcd_write_reg(0x32, 0x205);
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@ -261,7 +262,7 @@ static void lcd_init_seq_7783(void)
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lcd_write_reg(0x2b, 0xa);
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lcd_write_reg(9, 0);
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lcd_write_reg(7, 0x133);
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udelay(50);
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mdelay(50);
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lcd_write_reg(0x22, 0);
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}
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@ -288,7 +289,7 @@ void lcd_init_device(void)
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lcd_kind = LCD_KIND_OTHER;
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}
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}
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udelay(5);
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mdelay(5);
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switch(lcd_kind)
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{
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case LCD_KIND_7783: lcd_init_seq_7783(); break;
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@ -304,28 +305,28 @@ static void lcd_enable_7783(bool enable)
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if(!enable)
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{
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lcd_write_reg(7, 0x131);
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udelay(50);
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mdelay(50);
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lcd_write_reg(7, 0x20);
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udelay(50);
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mdelay(50);
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lcd_write_reg(0x10, 0x82);
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udelay(50);
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mdelay(50);
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}
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else
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{
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lcd_write_reg(0x11, 5);
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lcd_write_reg(0x10, 0x12b0);
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udelay(50);
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mdelay(50);
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lcd_write_reg(7, 0x11);
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udelay(50);
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mdelay(50);
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lcd_write_reg(0x12, 0x89);
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udelay(50);
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mdelay(50);
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lcd_write_reg(0x13, 0x1d00);
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udelay(50);
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mdelay(50);
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lcd_write_reg(0x29, 0x2f);
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udelay(50);
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mdelay(50);
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lcd_write_reg(0x2b, 0xa);
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lcd_write_reg(7, 0x133);
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udelay(50);
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mdelay(50);
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lcd_write_reg(0x22, 0);
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}
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}
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