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Add a STORAGE_ALIGN_ATTR macro, similar to CACHEALIGN_ATTR, for consistency

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26982 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sparmann 2010-06-20 12:23:57 +00:00
parent 53c799e445
commit 3b97fbd91e
1 changed files with 1 additions and 0 deletions
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firmware/export/system.h
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@ -336,6 +336,7 @@ static inline void cpucache_flush(void)
#endif /* PROC_NEEDS_CACHEALIGN */
#ifdef STORAGE_WANTS_ALIGN
#define STORAGE_ALIGN_ATTR __attribute__((aligned(CACHEALIGN_SIZE)))
#define STORAGE_ALIGN_DOWN(x) \
((typeof (x))ALIGN_DOWN_P2((uintptr_t)(x), CACHEALIGN_BITS))
/* Pad a size so the buffer can be aligned later */