forked from len0rd/rockbox
Further MMC driver touchup: * Save a tiny amount of power by not enabling the internal flash clock when accessing the MMC. * R2W factors > 32 are valid in newer MMC specs, so don't limit to 32 anymore. * Revise the port setup, and only do the basic setup once.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18541 a1c6a512-1295-4272-9138-f99709370657
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d29faf07a3
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1 changed files with 36 additions and 42 deletions
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@ -172,6 +172,8 @@ static int select_card(int card_no)
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led(true);
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led(true);
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last_disk_activity = current_tick;
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last_disk_activity = current_tick;
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mmc_enable_int_flash_clock(card_no == 0);
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if (!card_info[card_no].initialized)
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if (!card_info[card_no].initialized)
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{
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{
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setup_sci1(7); /* Initial rate: 375 kbps (need <= 400 per mmc specs) */
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setup_sci1(7); /* Initial rate: 375 kbps (need <= 400 per mmc specs) */
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@ -406,7 +408,7 @@ static int initialize_card(int card_no)
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return -1; /* error response */
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return -1; /* error response */
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/* initialize card */
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/* initialize card */
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for (i = 0; i < 100; i++) /* timeout 1 sec */
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for (i = 0; i < HZ; i++) /* timeout 1 sec */
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{
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{
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sleep(1);
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sleep(1);
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if (send_cmd(CMD_SEND_OP_COND, 0, response) == 0)
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if (send_cmd(CMD_SEND_OP_COND, 0, response) == 0)
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@ -461,14 +463,11 @@ static int initialize_card(int card_no)
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/* r2w_factor, write timeout */
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/* r2w_factor, write timeout */
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card->r2w_factor = 1 << card_extract_bits(card->csd, 99, 3);
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card->r2w_factor = 1 << card_extract_bits(card->csd, 99, 3);
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if (card->r2w_factor > 32) /* dirty MMC spec violation */
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{
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card->read_timeout *= 4; /* add safety factor */
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card->write_timeout = card->read_timeout * 8;
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}
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else
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card->write_timeout = card->read_timeout * card->r2w_factor;
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card->write_timeout = card->read_timeout * card->r2w_factor;
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if (card->r2w_factor > 32) /* Such cards often need extra read delay */
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card->read_timeout *= 4;
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/* switch to full speed */
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/* switch to full speed */
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setup_sci1(card->bitrate_register);
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setup_sci1(card->bitrate_register);
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@ -943,18 +942,15 @@ int ata_soft_reset(void)
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void ata_enable(bool on)
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void ata_enable(bool on)
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{
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{
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PBCR1 &= ~0x0CF0; /* PB13, PB11 and PB10 become GPIOs, if not modified below */
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PBCR1 &= ~0x0CF0; /* PB13, PB11 and PB10 become GPIO,
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PACR2 &= ~0x4000; /* use PA7 (bridge reset) as GPIO */
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* if not modified below */
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if (on)
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if (on)
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{
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PBCR1 |= 0x08A0; /* as SCK1, TxD1, RxD1 */
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PBCR1 |= 0x08A0; /* as SCK1, TxD1, RxD1 */
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IPRE &= 0x0FFF; /* disable SCI1 interrupts for the CPU */
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mmc_enable_int_flash_clock(true); /* always enabled in SPI mode */
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and_b(~0x80, &PADRL); /* assert flash reset */
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}
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sleep(HZ/100);
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and_b(~0x80, &PADRL); /* assert reset */
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or_b(0x80, &PADRL); /* de-assert flash reset */
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sleep(HZ/20);
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sleep(HZ/100);
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or_b(0x80, &PADRL); /* de-assert reset */
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sleep(HZ/20);
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card_info[0].initialized = false;
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card_info[0].initialized = false;
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card_info[1].initialized = false;
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card_info[1].initialized = false;
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}
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}
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@ -971,36 +967,33 @@ int ata_init(void)
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mutex_lock(&mmc_mutex);
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mutex_lock(&mmc_mutex);
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led(false);
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led(false);
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/* Port setup */
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PACR1 &= ~0x0F00; /* GPIO function for PA12, /IRQ1 for PA13 */
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PACR1 |= 0x0400;
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PADR |= 0x0680; /* set all the selects + reset high (=inactive) */
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PAIOR |= 0x1680; /* make outputs for them and the PA12 clock gate */
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PBDR |= 0x2C00; /* SCK1, TxD1 and RxD1 high when GPIO CHECKME: mask */
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PBIOR |= 0x2000; /* SCK1 output */
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PBIOR &= ~0x0C00; /* TxD1, RxD1 input */
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last_mmc_status = mmc_detect();
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last_mmc_status = mmc_detect();
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#ifndef HAVE_MULTIVOLUME
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#ifndef HAVE_MULTIVOLUME
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if (last_mmc_status)
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/* Use MMC if inserted, internal flash otherwise */
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{ /* MMC inserted */
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current_card = last_mmc_status ? 1 : 0;
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current_card = 1;
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}
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else
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{ /* no MMC, use internal memory */
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current_card = 0;
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}
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#endif
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#endif
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new_mmc_circuit = ((HW_MASK & MMC_CLOCK_POLARITY) != 0);
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if (!initialized)
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ata_enable(true);
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if ( !initialized )
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{
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{
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if (!last_mmc_status)
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if (!last_mmc_status)
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mmc_status = MMC_UNTOUCHED;
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mmc_status = MMC_UNTOUCHED;
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/* Port setup */
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PACR1 &= ~0x0F3C; /* GPIO function for PA13 (flash busy), PA12
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* (clk gate), PA10 (flash CS), PA9 (MMC CS) */
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PACR2 &= ~0x4000; /* GPIO for PA7 (flash reset) */
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PADR |= 0x0680; /* set all the selects + reset high (=inactive) */
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PAIOR |= 0x1680; /* make outputs for them and the PA12 clock gate */
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PBCR1 &= ~0x0CF0; /* GPIO function for PB13, PB11 and PB10 */
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PBDR |= 0x2C00; /* SCK1, TxD1 and RxD1 high in GPIO */
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PBIOR |= 0x2000; /* SCK1 output */
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PBIOR &= ~0x0C00; /* TxD1, RxD1 input */
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IPRE &= 0x0FFF; /* disable SCI1 interrupts for the CPU */
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new_mmc_circuit = ((HW_MASK & MMC_CLOCK_POLARITY) != 0);
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create_thread(mmc_thread, mmc_stack,
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create_thread(mmc_thread, mmc_stack,
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sizeof(mmc_stack), 0, mmc_thread_name
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sizeof(mmc_stack), 0, mmc_thread_name
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IF_PRIO(, PRIORITY_SYSTEM)
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IF_PRIO(, PRIORITY_SYSTEM)
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@ -1008,6 +1001,7 @@ int ata_init(void)
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tick_add_task(mmc_tick);
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tick_add_task(mmc_tick);
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initialized = true;
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initialized = true;
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}
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}
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ata_enable(true);
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mutex_unlock(&mmc_mutex);
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mutex_unlock(&mmc_mutex);
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return rc;
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return rc;
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