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Further MMC driver touchup: * Save a tiny amount of power by not enabling the internal flash clock when accessing the MMC. * R2W factors > 32 are valid in newer MMC specs, so don't limit to 32 anymore. * Revise the port setup, and only do the basic setup once.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18541 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jens Arnold 2008-09-17 18:53:11 +00:00
parent d29faf07a3
commit 3655a32a3e

View file

@ -172,6 +172,8 @@ static int select_card(int card_no)
led(true); led(true);
last_disk_activity = current_tick; last_disk_activity = current_tick;
mmc_enable_int_flash_clock(card_no == 0);
if (!card_info[card_no].initialized) if (!card_info[card_no].initialized)
{ {
setup_sci1(7); /* Initial rate: 375 kbps (need <= 400 per mmc specs) */ setup_sci1(7); /* Initial rate: 375 kbps (need <= 400 per mmc specs) */
@ -406,7 +408,7 @@ static int initialize_card(int card_no)
return -1; /* error response */ return -1; /* error response */
/* initialize card */ /* initialize card */
for (i = 0; i < 100; i++) /* timeout 1 sec */ for (i = 0; i < HZ; i++) /* timeout 1 sec */
{ {
sleep(1); sleep(1);
if (send_cmd(CMD_SEND_OP_COND, 0, response) == 0) if (send_cmd(CMD_SEND_OP_COND, 0, response) == 0)
@ -461,14 +463,11 @@ static int initialize_card(int card_no)
/* r2w_factor, write timeout */ /* r2w_factor, write timeout */
card->r2w_factor = 1 << card_extract_bits(card->csd, 99, 3); card->r2w_factor = 1 << card_extract_bits(card->csd, 99, 3);
if (card->r2w_factor > 32) /* dirty MMC spec violation */
{
card->read_timeout *= 4; /* add safety factor */
card->write_timeout = card->read_timeout * 8;
}
else
card->write_timeout = card->read_timeout * card->r2w_factor; card->write_timeout = card->read_timeout * card->r2w_factor;
if (card->r2w_factor > 32) /* Such cards often need extra read delay */
card->read_timeout *= 4;
/* switch to full speed */ /* switch to full speed */
setup_sci1(card->bitrate_register); setup_sci1(card->bitrate_register);
@ -943,18 +942,15 @@ int ata_soft_reset(void)
void ata_enable(bool on) void ata_enable(bool on)
{ {
PBCR1 &= ~0x0CF0; /* PB13, PB11 and PB10 become GPIOs, if not modified below */ PBCR1 &= ~0x0CF0; /* PB13, PB11 and PB10 become GPIO,
PACR2 &= ~0x4000; /* use PA7 (bridge reset) as GPIO */ * if not modified below */
if (on) if (on)
{
PBCR1 |= 0x08A0; /* as SCK1, TxD1, RxD1 */ PBCR1 |= 0x08A0; /* as SCK1, TxD1, RxD1 */
IPRE &= 0x0FFF; /* disable SCI1 interrupts for the CPU */
mmc_enable_int_flash_clock(true); /* always enabled in SPI mode */ and_b(~0x80, &PADRL); /* assert flash reset */
} sleep(HZ/100);
and_b(~0x80, &PADRL); /* assert reset */ or_b(0x80, &PADRL); /* de-assert flash reset */
sleep(HZ/20); sleep(HZ/100);
or_b(0x80, &PADRL); /* de-assert reset */
sleep(HZ/20);
card_info[0].initialized = false; card_info[0].initialized = false;
card_info[1].initialized = false; card_info[1].initialized = false;
} }
@ -971,36 +967,33 @@ int ata_init(void)
mutex_lock(&mmc_mutex); mutex_lock(&mmc_mutex);
led(false); led(false);
/* Port setup */
PACR1 &= ~0x0F00; /* GPIO function for PA12, /IRQ1 for PA13 */
PACR1 |= 0x0400;
PADR |= 0x0680; /* set all the selects + reset high (=inactive) */
PAIOR |= 0x1680; /* make outputs for them and the PA12 clock gate */
PBDR |= 0x2C00; /* SCK1, TxD1 and RxD1 high when GPIO CHECKME: mask */
PBIOR |= 0x2000; /* SCK1 output */
PBIOR &= ~0x0C00; /* TxD1, RxD1 input */
last_mmc_status = mmc_detect(); last_mmc_status = mmc_detect();
#ifndef HAVE_MULTIVOLUME #ifndef HAVE_MULTIVOLUME
if (last_mmc_status) /* Use MMC if inserted, internal flash otherwise */
{ /* MMC inserted */ current_card = last_mmc_status ? 1 : 0;
current_card = 1;
}
else
{ /* no MMC, use internal memory */
current_card = 0;
}
#endif #endif
new_mmc_circuit = ((HW_MASK & MMC_CLOCK_POLARITY) != 0); if (!initialized)
ata_enable(true);
if ( !initialized )
{ {
if (!last_mmc_status) if (!last_mmc_status)
mmc_status = MMC_UNTOUCHED; mmc_status = MMC_UNTOUCHED;
/* Port setup */
PACR1 &= ~0x0F3C; /* GPIO function for PA13 (flash busy), PA12
* (clk gate), PA10 (flash CS), PA9 (MMC CS) */
PACR2 &= ~0x4000; /* GPIO for PA7 (flash reset) */
PADR |= 0x0680; /* set all the selects + reset high (=inactive) */
PAIOR |= 0x1680; /* make outputs for them and the PA12 clock gate */
PBCR1 &= ~0x0CF0; /* GPIO function for PB13, PB11 and PB10 */
PBDR |= 0x2C00; /* SCK1, TxD1 and RxD1 high in GPIO */
PBIOR |= 0x2000; /* SCK1 output */
PBIOR &= ~0x0C00; /* TxD1, RxD1 input */
IPRE &= 0x0FFF; /* disable SCI1 interrupts for the CPU */
new_mmc_circuit = ((HW_MASK & MMC_CLOCK_POLARITY) != 0);
create_thread(mmc_thread, mmc_stack, create_thread(mmc_thread, mmc_stack,
sizeof(mmc_stack), 0, mmc_thread_name sizeof(mmc_stack), 0, mmc_thread_name
IF_PRIO(, PRIORITY_SYSTEM) IF_PRIO(, PRIORITY_SYSTEM)
@ -1008,6 +1001,7 @@ int ata_init(void)
tick_add_task(mmc_tick); tick_add_task(mmc_tick);
initialized = true; initialized = true;
} }
ata_enable(true);
mutex_unlock(&mmc_mutex); mutex_unlock(&mmc_mutex);
return rc; return rc;