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Another optimisation from Fredrik Öhrn - put the Z80 registers and some lookup tables in IRAM. Gives a significant boost on Coldfire targets

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@9053 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dave Chapman 2006-03-15 22:39:14 +00:00
parent 211d827c0a
commit 318953334b
1 changed files with 25 additions and 25 deletions
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50
apps/plugins/pacbox/z80.c
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@ -28,7 +28,7 @@
#include "z80_internal.h" #include "z80_internal.h"
// Table with parity, sign and zero flags precomputed for each byte value // Table with parity, sign and zero flags precomputed for each byte value
unsigned char PSZ_[256] = { unsigned char PSZ_[256] IDATA_ATTR = {
Zero|Parity, 0, 0, Parity, 0, Parity, Parity, 0, 0, Parity, Parity, 0, Parity, 0, 0, Parity, Zero|Parity, 0, 0, Parity, 0, Parity, Parity, 0, 0, Parity, Parity, 0, Parity, 0, 0, Parity,
0, Parity, Parity, 0, Parity, 0, 0, Parity, Parity, 0, 0, Parity, 0, Parity, Parity, 0, 0, Parity, Parity, 0, Parity, 0, 0, Parity, Parity, 0, 0, Parity, 0, Parity, Parity, 0,
0, Parity, Parity, 0, Parity, 0, 0, Parity, Parity, 0, 0, Parity, 0, Parity, Parity, 0, 0, Parity, Parity, 0, Parity, 0, 0, Parity, Parity, 0, 0, Parity, 0, Parity, Parity, 0,
@ -76,33 +76,33 @@ void do_opcode_xy( OpcodeInfo * );
/** */ /** */
unsigned do_opcode_xycb( unsigned xy ); unsigned do_opcode_xycb( unsigned xy );
unsigned iflags_; // Interrupt mode (bits 0 and 1) and flags unsigned iflags_ IBSS_ATTR; // Interrupt mode (bits 0 and 1) and flags
unsigned cycles_; // Number of CPU cycles elapsed so far unsigned cycles_ IBSS_ATTR; // Number of CPU cycles elapsed so far
// Registers // Registers
unsigned char B; //@- B register unsigned char B IBSS_ATTR; //@- B register
unsigned char C; //@- C register unsigned char C IBSS_ATTR; //@- C register
unsigned char D; //@- D register unsigned char D IBSS_ATTR; //@- D register
unsigned char E; //@- E register unsigned char E IBSS_ATTR; //@- E register
unsigned char H; //@- H register unsigned char H IBSS_ATTR; //@- H register
unsigned char L; //@- L register unsigned char L IBSS_ATTR; //@- L register
unsigned char A; //@- A register (accumulator) unsigned char A IBSS_ATTR; //@- A register (accumulator)
unsigned char F; //@- Flags register unsigned char F IBSS_ATTR; //@- Flags register
unsigned char B1; //@- Alternate B register (B') unsigned char B1 IBSS_ATTR; //@- Alternate B register (B')
unsigned char C1; //@- Alternate C register (C') unsigned char C1 IBSS_ATTR; //@- Alternate C register (C')
unsigned char D1; //@- Alternate D register (D') unsigned char D1 IBSS_ATTR; //@- Alternate D register (D')
unsigned char E1; //@- Alternate E register (E') unsigned char E1 IBSS_ATTR; //@- Alternate E register (E')
unsigned char H1; //@- Alternate H register (H') unsigned char H1 IBSS_ATTR; //@- Alternate H register (H')
unsigned char L1; //@- Alternate L register (L') unsigned char L1 IBSS_ATTR; //@- Alternate L register (L')
unsigned char A1; //@- Alternate A register (A') unsigned char A1 IBSS_ATTR; //@- Alternate A register (A')
unsigned char F1; //@- Alternate flags register (F') unsigned char F1 IBSS_ATTR; //@- Alternate flags register (F')
unsigned IX; //@- Index register X unsigned IX IBSS_ATTR; //@- Index register X
unsigned IY; //@- Index register Y unsigned IY IBSS_ATTR; //@- Index register Y
unsigned PC; //@- Program counter unsigned PC IBSS_ATTR; //@- Program counter
unsigned SP; //@- Stack pointer unsigned SP IBSS_ATTR; //@- Stack pointer
unsigned char I; //@- Interrupt register unsigned char I IBSS_ATTR; //@- Interrupt register
unsigned char R; //@- Refresh register unsigned char R IBSS_ATTR; //@- Refresh register
/** Returns the 16 bit register BC. */ /** Returns the 16 bit register BC. */