forked from len0rd/rockbox
Ingenic Jz4740: enable IRAM (only core, without ibss)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21331 a1c6a512-1295-4272-9138-f99709370657
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0181bc42c9
commit
2fb6396f5a
3 changed files with 15 additions and 34 deletions
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@ -639,13 +639,14 @@ Lyre prototype 1*/
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(CONFIG_CPU == AS3525 && MEMORYSIZE > 2) || /* AS3525 +2MB: core, plugins, codecs */ \
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(CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525 2MB:core only */ \
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(CONFIG_CPU == PNX0101) || \
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(CONFIG_CPU == S5L8700)) /* Samsung S5L8700: core, plugins, codecs */
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(CONFIG_CPU == S5L8700)) /* Samsung S5L8700: core, plugins, codecs */ || \
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(CONFIG_CPU == JZ4732 && !defined(PLUGIN) && !defined(CODEC)) /* Jz4740: core only */
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#define ICODE_ATTR __attribute__ ((section(".icode")))
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#define ICONST_ATTR __attribute__ ((section(".irodata")))
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#define IDATA_ATTR __attribute__ ((section(".idata")))
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#define IBSS_ATTR __attribute__ ((section(".ibss")))
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#define USE_IRAM
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#if CONFIG_CPU != SH7034 && (CONFIG_CPU != AS3525 || MEMORYSIZE > 2)
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#if CONFIG_CPU != SH7034 && (CONFIG_CPU != AS3525 || MEMORYSIZE > 2) && CONFIG_CPU != JZ4732
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#define PLUGIN_USE_IRAM
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#endif
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#if defined(CPU_ARM)
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@ -16,7 +16,7 @@ STARTUP(target/mips/ingenic_jz47xx/crt0.o)
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#define DRAMORIG 0x80004000
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#define IRAMORIG 0x80000000
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#define IRAMSIZE (16K-0x220)
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#define IRAMSIZE 16K
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/* End of the audio buffer, where the codec buffer starts */
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#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
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@ -94,13 +94,12 @@ SECTIONS
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stackend = .;
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} > IRAM
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. = ALIGN(4);
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.bss (NOLOAD):
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{
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_edata = .;
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*(.sbss*);
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*(.bss*);
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*(.ibss*); /* Don't put this in IRAM as there's not enough space */
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*(COMMON);
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*(.scommon*);
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_end = .;
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@ -108,13 +107,6 @@ SECTIONS
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. = ALIGN(4);
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.ibss (NOLOAD) :
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{
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_iedata = .;
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*(.ibss*);
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_iend = .;
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} > IRAM
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.audiobuf ALIGN(4) :
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{
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audiobuffer = .;
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@ -148,18 +148,6 @@ _bss_loop:
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bne t0, t1, _bss_loop
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addiu t0, 4
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/*
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----------------------------------------------------
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Clear IBSS section
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----------------------------------------------------
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*/
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la t0, _iedata
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la t1, _iend
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_ibss_loop:
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sw zero, 0(t0)
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bne t0, t1, _ibss_loop
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addiu t0, 4
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/*
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----------------------------------------------------
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Set up stack
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