forked from len0rd/rockbox
imx233: clarity comment about errata
Change-Id: I3309ce112762f09fcf6bce9d416dbf4b0aa2f197
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1 changed files with 3 additions and 1 deletions
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@ -88,14 +88,16 @@ void imx233_i2c_init(void)
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imx233_pinctrl_setup_vpin(VPIN_I2C_SDA, "i2c sda", PINCTRL_DRIVE_4mA, true);
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imx233_pinctrl_setup_vpin(VPIN_I2C_SDA, "i2c sda", PINCTRL_DRIVE_4mA, true);
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/* clear softreset */
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/* clear softreset */
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imx233_reset_block(&HW_I2C_CTRL0);
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imx233_reset_block(&HW_I2C_CTRL0);
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/* Errata:
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/* Errata (imx233):
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* When RETAIN_CLOCK is set, the ninth clock pulse (ACK) is not generated. However, the SDA
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* When RETAIN_CLOCK is set, the ninth clock pulse (ACK) is not generated. However, the SDA
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* line is read at the proper timing interval. If RETAIN_CLOCK is cleared, the ninth clock pulse is
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* line is read at the proper timing interval. If RETAIN_CLOCK is cleared, the ninth clock pulse is
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* generated.
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* generated.
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* HW_I2C_CTRL1[ACK_MODE] has default value of 0. It should be set to 1 to enable the fix for
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* HW_I2C_CTRL1[ACK_MODE] has default value of 0. It should be set to 1 to enable the fix for
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* this issue.
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* this issue.
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*/
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*/
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#if IMX233_SUBTARGET >= 3780
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BF_SET(I2C_CTRL1, ACK_MODE);
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BF_SET(I2C_CTRL1, ACK_MODE);
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#endif
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BF_SET(I2C_CTRL0, CLKGATE);
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BF_SET(I2C_CTRL0, CLKGATE);
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/* Fast-mode @ 400K */
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/* Fast-mode @ 400K */
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HW_I2C_TIMING0 = 0x000F0007; /* tHIGH=0.6us, read at 0.3us */
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HW_I2C_TIMING0 = 0x000F0007; /* tHIGH=0.6us, read at 0.3us */
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