forked from len0rd/rockbox
wma: move inline functions into .h file
use 'static inline' instead of GCC extension 'inline' some GCC don't support this (android NDK for example) git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27679 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré
parent
79d5c0702b
commit
2c00cb5e83
3 changed files with 130 additions and 134 deletions
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@ -30,10 +30,6 @@
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#include "wmadata.h"
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static void wma_lsp_to_curve_init(WMADecodeContext *s, int frame_len);
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inline void vector_fmul_add_add(fixed32 *dst, const fixed32 *data,
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const fixed32 *window, int n);
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inline void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0,
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const fixed32 *src1, int len);
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/*declarations of statically allocated variables used to remove malloc calls*/
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@ -63,135 +63,6 @@ fixed64 Fixed32To64(fixed32 x)
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return (fixed64)x;
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}
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/*
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* Helper functions for wma_window.
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*
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*
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*/
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#ifdef CPU_ARM
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inline void vector_fmul_add_add(fixed32 *dst, const fixed32 *data,
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const fixed32 *window, int n)
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{
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/* Block sizes are always power of two */
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asm volatile (
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"0:"
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"ldmia %[d]!, {r0, r1};"
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"ldmia %[w]!, {r4, r5};"
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/* consume the first data and window value so we can use those
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* registers again */
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"smull r8, r9, r0, r4;"
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"ldmia %[dst], {r0, r4};"
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"add r0, r0, r9, lsl #1;" /* *dst=*dst+(r9<<1)*/
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"smull r8, r9, r1, r5;"
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"add r1, r4, r9, lsl #1;"
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"stmia %[dst]!, {r0, r1};"
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"subs %[n], %[n], #2;"
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"bne 0b;"
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: [d] "+r" (data), [w] "+r" (window), [dst] "+r" (dst), [n] "+r" (n)
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: : "r0", "r1", "r4", "r5", "r8", "r9", "memory", "cc");
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}
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inline void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0, const fixed32 *src1,
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int len)
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{
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/* Block sizes are always power of two */
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asm volatile (
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"add %[s1], %[s1], %[n], lsl #2;"
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"0:"
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"ldmia %[s0]!, {r0, r1};"
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"ldmdb %[s1]!, {r4, r5};"
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"smull r8, r9, r0, r5;"
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"mov r0, r9, lsl #1;"
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"smull r8, r9, r1, r4;"
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"mov r1, r9, lsl #1;"
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"stmia %[dst]!, {r0, r1};"
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"subs %[n], %[n], #2;"
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"bne 0b;"
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: [s0] "+r" (src0), [s1] "+r" (src1), [dst] "+r" (dst), [n] "+r" (len)
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: : "r0", "r1", "r4", "r5", "r8", "r9", "memory", "cc");
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}
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#elif defined(CPU_COLDFIRE)
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inline void vector_fmul_add_add(fixed32 *dst, const fixed32 *data,
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const fixed32 *window, int n)
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{
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/* Block sizes are always power of two. Smallest block is always way bigger
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* than four too.*/
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asm volatile (
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"0:"
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"movem.l (%[d]), %%d0-%%d3;"
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"movem.l (%[w]), %%d4-%%d5/%%a0-%%a1;"
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"mac.l %%d0, %%d4, %%acc0;"
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"mac.l %%d1, %%d5, %%acc1;"
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"mac.l %%d2, %%a0, %%acc2;"
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"mac.l %%d3, %%a1, %%acc3;"
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"lea.l (16, %[d]), %[d];"
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"lea.l (16, %[w]), %[w];"
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"movclr.l %%acc0, %%d0;"
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"movclr.l %%acc1, %%d1;"
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"movclr.l %%acc2, %%d2;"
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"movclr.l %%acc3, %%d3;"
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"movem.l (%[dst]), %%d4-%%d5/%%a0-%%a1;"
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"add.l %%d4, %%d0;"
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"add.l %%d5, %%d1;"
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"add.l %%a0, %%d2;"
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"add.l %%a1, %%d3;"
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"movem.l %%d0-%%d3, (%[dst]);"
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"lea.l (16, %[dst]), %[dst];"
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"subq.l #4, %[n];"
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"jne 0b;"
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: [d] "+a" (data), [w] "+a" (window), [dst] "+a" (dst), [n] "+d" (n)
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: : "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1", "memory", "cc");
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}
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inline void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0, const fixed32 *src1,
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int len)
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{
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/* Block sizes are always power of two. Smallest block is always way bigger
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* than four too.*/
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asm volatile (
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"lea.l (-16, %[s1], %[n]*4), %[s1];"
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"0:"
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"movem.l (%[s0]), %%d0-%%d3;"
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"movem.l (%[s1]), %%d4-%%d5/%%a0-%%a1;"
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"mac.l %%d0, %%a1, %%acc0;"
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"mac.l %%d1, %%a0, %%acc1;"
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"mac.l %%d2, %%d5, %%acc2;"
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"mac.l %%d3, %%d4, %%acc3;"
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"lea.l (16, %[s0]), %[s0];"
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"lea.l (-16, %[s1]), %[s1];"
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"movclr.l %%acc0, %%d0;"
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"movclr.l %%acc1, %%d1;"
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"movclr.l %%acc2, %%d2;"
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"movclr.l %%acc3, %%d3;"
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"movem.l %%d0-%%d3, (%[dst]);"
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"lea.l (16, %[dst]), %[dst];"
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"subq.l #4, %[n];"
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"jne 0b;"
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: [s0] "+a" (src0), [s1] "+a" (src1), [dst] "+a" (dst), [n] "+d" (len)
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: : "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1", "memory", "cc");
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}
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#else
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inline void vector_fmul_add_add(fixed32 *dst, const fixed32 *src0, const fixed32 *src1, int len){
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int i;
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for(i=0; i<len; i++)
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dst[i] = fixmul32b(src0[i], src1[i]) + dst[i];
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}
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inline void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0, const fixed32 *src1, int len){
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int i;
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src1 += len-1;
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for(i=0; i<len; i++)
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dst[i] = fixmul32b(src0[i], src1[-i]);
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}
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#endif
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/*
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Not performance senstitive code here
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@ -106,3 +106,132 @@ static inline fixed32 fixmul32(fixed32 x, fixed32 y)
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}
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#endif
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/*
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* Helper functions for wma_window.
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*
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*
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*/
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#ifdef CPU_ARM
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static inline void vector_fmul_add_add(fixed32 *dst, const fixed32 *data,
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const fixed32 *window, int n)
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{
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/* Block sizes are always power of two */
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asm volatile (
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"0:"
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"ldmia %[d]!, {r0, r1};"
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"ldmia %[w]!, {r4, r5};"
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/* consume the first data and window value so we can use those
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* registers again */
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"smull r8, r9, r0, r4;"
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"ldmia %[dst], {r0, r4};"
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"add r0, r0, r9, lsl #1;" /* *dst=*dst+(r9<<1)*/
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"smull r8, r9, r1, r5;"
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"add r1, r4, r9, lsl #1;"
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"stmia %[dst]!, {r0, r1};"
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"subs %[n], %[n], #2;"
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"bne 0b;"
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: [d] "+r" (data), [w] "+r" (window), [dst] "+r" (dst), [n] "+r" (n)
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: : "r0", "r1", "r4", "r5", "r8", "r9", "memory", "cc");
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}
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static inline void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0, const fixed32 *src1,
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int len)
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{
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/* Block sizes are always power of two */
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asm volatile (
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"add %[s1], %[s1], %[n], lsl #2;"
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"0:"
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"ldmia %[s0]!, {r0, r1};"
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"ldmdb %[s1]!, {r4, r5};"
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"smull r8, r9, r0, r5;"
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"mov r0, r9, lsl #1;"
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"smull r8, r9, r1, r4;"
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"mov r1, r9, lsl #1;"
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"stmia %[dst]!, {r0, r1};"
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"subs %[n], %[n], #2;"
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"bne 0b;"
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: [s0] "+r" (src0), [s1] "+r" (src1), [dst] "+r" (dst), [n] "+r" (len)
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: : "r0", "r1", "r4", "r5", "r8", "r9", "memory", "cc");
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}
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#elif defined(CPU_COLDFIRE)
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static inline void vector_fmul_add_add(fixed32 *dst, const fixed32 *data,
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const fixed32 *window, int n)
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{
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/* Block sizes are always power of two. Smallest block is always way bigger
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* than four too.*/
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asm volatile (
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"0:"
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"movem.l (%[d]), %%d0-%%d3;"
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"movem.l (%[w]), %%d4-%%d5/%%a0-%%a1;"
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"mac.l %%d0, %%d4, %%acc0;"
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"mac.l %%d1, %%d5, %%acc1;"
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"mac.l %%d2, %%a0, %%acc2;"
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"mac.l %%d3, %%a1, %%acc3;"
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"lea.l (16, %[d]), %[d];"
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"lea.l (16, %[w]), %[w];"
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"movclr.l %%acc0, %%d0;"
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"movclr.l %%acc1, %%d1;"
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"movclr.l %%acc2, %%d2;"
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"movclr.l %%acc3, %%d3;"
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"movem.l (%[dst]), %%d4-%%d5/%%a0-%%a1;"
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"add.l %%d4, %%d0;"
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"add.l %%d5, %%d1;"
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"add.l %%a0, %%d2;"
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"add.l %%a1, %%d3;"
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"movem.l %%d0-%%d3, (%[dst]);"
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"lea.l (16, %[dst]), %[dst];"
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"subq.l #4, %[n];"
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"jne 0b;"
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: [d] "+a" (data), [w] "+a" (window), [dst] "+a" (dst), [n] "+d" (n)
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: : "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1", "memory", "cc");
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}
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static inline void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0, const fixed32 *src1,
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int len)
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{
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/* Block sizes are always power of two. Smallest block is always way bigger
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* than four too.*/
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asm volatile (
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"lea.l (-16, %[s1], %[n]*4), %[s1];"
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"0:"
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"movem.l (%[s0]), %%d0-%%d3;"
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"movem.l (%[s1]), %%d4-%%d5/%%a0-%%a1;"
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"mac.l %%d0, %%a1, %%acc0;"
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"mac.l %%d1, %%a0, %%acc1;"
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"mac.l %%d2, %%d5, %%acc2;"
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"mac.l %%d3, %%d4, %%acc3;"
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"lea.l (16, %[s0]), %[s0];"
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"lea.l (-16, %[s1]), %[s1];"
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"movclr.l %%acc0, %%d0;"
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"movclr.l %%acc1, %%d1;"
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"movclr.l %%acc2, %%d2;"
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"movclr.l %%acc3, %%d3;"
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"movem.l %%d0-%%d3, (%[dst]);"
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"lea.l (16, %[dst]), %[dst];"
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"subq.l #4, %[n];"
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"jne 0b;"
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: [s0] "+a" (src0), [s1] "+a" (src1), [dst] "+a" (dst), [n] "+d" (len)
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: : "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1", "memory", "cc");
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}
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#else
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static inline void vector_fmul_add_add(fixed32 *dst, const fixed32 *src0, const fixed32 *src1, int len){
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int i;
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for(i=0; i<len; i++)
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dst[i] = fixmul32b(src0[i], src1[i]) + dst[i];
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}
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static inline void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0, const fixed32 *src1, int len){
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int i;
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src1 += len-1;
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for(i=0; i<len; i++)
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dst[i] = fixmul32b(src0[i], src1[-i]);
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}
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#endif
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