forked from len0rd/rockbox
rk27xx: substitute magic constants with meaningful names for clock gating
Change-Id: I6c66c7496db3db78e5c959414464826134dbe200
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1fa406dc21
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2b6dfdb34e
9 changed files with 66 additions and 35 deletions
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@ -124,6 +124,38 @@
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#define SCU_PLLCON3 (*(volatile unsigned long *)(APB0_SCU + 0x10))
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#define SCU_DIVCON1 (*(volatile unsigned long *)(APB0_SCU + 0x14))
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#define SCU_CLKCFG (*(volatile unsigned long *)(APB0_SCU + 0x18))
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#define CLKCFG_OTP (1<<0)
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#define CLKCFG_DSP (1<<1)
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#define CLKCFG_SDRAM (1<<2)
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#define CLKCFG_HDMA (1<<3)
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#define CLKCFG_DWDMA (1<<4)
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#define CLKCFG_UHC (1<<5)
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#define CLKCFG_UDC (1<<6)
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/* 7 - 8 reserved */
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#define CLKCFG_NAND (1<<9)
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#define CLKCFG_A2A (1<<10)
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#define CLKCFG_SRAM (1<<11)
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#define CLKCFG_HCLK_LCDC (1<<12)
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#define CLKCFG_LCDC (1<<13)
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#define CLKCFG_HCLK_VIP (1<<14)
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#define CLKCFG_VIP (1<<15)
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#define CLKCFG_I2S (1<<16)
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#define CLKCFG_PCLK_I2S (1<<17)
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#define CLKCFG_UART0 (1<<18)
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#define CLKCFG_UART1 (1<<19)
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#define CLKCFG_I2C (1<<20)
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#define CLKCFG_SPI (1<<21)
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#define CLKCFG_SD (1<<22)
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#define CLKCFG_PCLK_LSADC (1<<23)
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#define CLKCFG_LSADC (1<<24)
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#define CLKCFG_HCLK_HSADC (1<<25)
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#define CLKCFG_HSADC (1<<26)
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#define CLKCFG_GPIO (1<<27)
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#define CLKCFG_TIMER (1<<28)
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#define CLKCFG_PWM (1<<29)
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#define CLKCFG_RTC (1<<30)
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#define CLKCFG_WDT (1<<31)
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#define SCU_RSTCFG (*(volatile unsigned long *)(APB0_SCU + 0x1C))
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#define SCU_PWM (*(volatile unsigned long *)(APB0_SCU + 0x20))
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#define SCU_CPUPD (*(volatile unsigned long *)(APB0_SCU + 0x24))
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