forked from len0rd/rockbox
Add MPIO HD200 port - new files
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25725 a1c6a512-1295-4272-9138-f99709370657
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84
firmware/target/coldfire/mpio/hd200/adc-hd200.c
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84
firmware/target/coldfire/mpio/hd200/adc-hd200.c
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id:$
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*
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* Copyright (C) 2010 Marcin Bukat
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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#include "kernel.h"
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#include "thread.h"
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#include "adc.h"
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volatile unsigned short adc_data[NUM_ADC_CHANNELS] IBSS_ATTR;
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/* Reading takes 4096 adclk ticks
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* We do read one channel at once
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*
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* state FCPU Fbus Fadc bus/Fadc Fchannelread
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* default 11.2896 MHz 5.6448 MHz 5.6448 MHz 2 172.2656 Hz
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* normal 45.1584 MHz 22.5792 MHz 2.8224 MHz 8 172.2656 Hz
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* max 124.1856 MHz 62.0928 MHz 1.9404 MHz 32 118.4326 Hz
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*/
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void ADC(void) __attribute__ ((interrupt_handler,section(".icode")));
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void ADC(void)
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{
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static unsigned char channel;
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/* read current value */
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adc_data[(channel & 0x03)] = ADVALUE;
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/* switch channel
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*
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* set source remark
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* ADCONFIG is 16bit wide so we have to shift data by 16bits left
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* thats why we shift <<24 instead of <<8
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*/
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channel++;
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and_l(~(3<<24),&ADCONFIG);
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or_l( (((channel & 0x03) << 8 )|(1<<7))<<16, &ADCONFIG);
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}
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unsigned short adc_scan(int channel)
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{
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/* maybe we can drop &0x03 part */
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return adc_data[(channel&0x03)];
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}
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void adc_init(void)
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{
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/* GPIO38 GPIO39 */
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and_l(~((1<<6)|(1<<7)), &GPIO1_FUNCTION);
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/* ADOUT_SEL = 01
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* SOURCE SELECT = 000
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* CLEAR INTERRUPT FLAG
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* ENABLE INTERRUPT = 1
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* ADOUT_DRIVE = 00
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* ADCLK_SEL = 011 (busclk/8)
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*/
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ADCONFIG = (1<<10)|(1<<7)|(1<<6)|(1<<1)|(1<<0);
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/* ADC interrupt level 4.0 */
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or_l((4<<28), &INTPRI8);
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}
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