From 2800c55a6adda5987d9675e3e73185b8d7b30cab Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tomasz=20Mo=C5=84?= Date: Wed, 21 Dec 2011 16:06:36 +0000 Subject: [PATCH] TMS320DM320: Check for TIMER1 bit in udelay(). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31394 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/tms320dm320/system-dm320.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/firmware/target/arm/tms320dm320/system-dm320.c b/firmware/target/arm/tms320dm320/system-dm320.c index 741516a950..12e0b6d03d 100644 --- a/firmware/target/arm/tms320dm320/system-dm320.c +++ b/firmware/target/arm/tms320dm320/system-dm320.c @@ -437,7 +437,7 @@ void udelay(int usec) { /* * Status in IO_INTC_IRQ0 is changed even when interrupts are - * masked. If IRQ_TIMER1 bit in IO_INTC_IRQ0 is set to 0, then + * masked. If bit 1 in IO_INTC_IRQ0 is set to 0, then * there is pending current_tick update. * * Relaying solely on current_tick value when interrupts are disabled @@ -450,13 +450,13 @@ void udelay(int usec) { /* udelay will end after counter reset (tick) */ while ((IO_TIMER1_TMCNT < stop) || ((current_tick == prev_tick) /* ensure new tick */ && - (IO_INTC_IRQ0 & IRQ_TIMER1))); /* prevent lock */ + (IO_INTC_IRQ0 & (1 << 1)))); /* prevent lock */ } else { /* udelay will end before counter reset (tick) */ while ((IO_TIMER1_TMCNT < stop) && - ((current_tick == prev_tick) && (IO_INTC_IRQ0 & IRQ_TIMER1))); + ((current_tick == prev_tick) && (IO_INTC_IRQ0 & (1 << 1)))); } }