forked from len0rd/rockbox
APE: Fused vector math for the filters on ARMv6. Speedup is ~2.5% for -c2000, ~7% for -c3000 and higher.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24569 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jens Arnold
parent
9955e9a7df
commit
1cc4bd8f86
1 changed files with 371 additions and 170 deletions
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@ -24,148 +24,350 @@ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110, USA
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*/
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/* This version fetches data as 32 bit words, and *requires* v1 to be
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* 32 bit aligned, otherwise it will result either in a data abort, or
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* incorrect results (if ARM aligncheck is disabled). */
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static inline void vector_add(int16_t* v1, int16_t* v2)
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{
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#if ORDER > 32
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int cnt = ORDER>>5;
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#endif
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#define FUSED_VECTOR_MATH
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#if ORDER > 16
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#define ADD_SUB_BLOCKS "4"
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#define BLOCK_REPEAT "3"
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#else
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#define ADD_SUB_BLOCKS "2"
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#define BLOCK_REPEAT "1"
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#endif
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asm volatile (
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"tst %[v2], #2 \n"
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"beq 20f \n"
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"10: \n"
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"bic %[v2], %[v2], #2 \n"
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"ldmia %[v2]!, {r4-r5} \n"
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"1: \n"
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".rept " ADD_SUB_BLOCKS "\n"
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"ldmia %[v2]!, {r6-r7} \n"
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"ldmia %[v1], {r0-r3} \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r4, r5, r4, asr #16 \n"
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"sadd16 r0, r0, r4 \n"
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"pkhbt r5, r5, r6, lsl #16 \n"
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"sadd16 r1, r1, r5 \n"
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"ldmia %[v2]!, {r4-r5} \n"
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"mov r7, r7, ror #16 \n"
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"pkhtb r6, r7, r6, asr #16 \n"
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"sadd16 r2, r2, r6 \n"
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"pkhbt r7, r7, r4, lsl #16 \n"
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"sadd16 r3, r3, r7 \n"
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"stmia %[v1]!, {r0-r3} \n"
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".endr \n"
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#if ORDER > 32
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"subs %[cnt], %[cnt], #1 \n"
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"bne 1b \n"
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#endif
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"b 99f \n"
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"20: \n"
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"1: \n"
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".rept " ADD_SUB_BLOCKS "\n"
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"ldmia %[v2]!, {r4-r7} \n"
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"ldmia %[v1], {r0-r3} \n"
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"sadd16 r0, r0, r4 \n"
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"sadd16 r1, r1, r5 \n"
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"sadd16 r2, r2, r6 \n"
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"sadd16 r3, r3, r7 \n"
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"stmia %[v1]!, {r0-r3} \n"
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".endr \n"
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#if ORDER > 32
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"subs %[cnt], %[cnt], #1 \n"
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"bne 1b \n"
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#endif
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"99: \n"
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: /* outputs */
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#if ORDER > 32
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[cnt]"+r"(cnt),
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#endif
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[v1] "+r"(v1),
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[v2] "+r"(v2)
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: /* inputs */
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: /* clobbers */
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"r0", "r1", "r2", "r3", "r4",
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"r5", "r6", "r7", "memory"
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);
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}
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/* This version fetches data as 32 bit words, and *requires* v1 to be
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* 32 bit aligned, otherwise it will result either in a data abort, or
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* incorrect results (if ARM aligncheck is disabled). */
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static inline void vector_sub(int16_t* v1, int16_t* v2)
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/* Calculate scalarproduct, then add a 2nd vector (fused for performance)
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* This version fetches data as 32 bit words, and *requires* v1 to be
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* 32 bit aligned. It also requires that f2 and s2 are either both 32 bit
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* aligned or both unaligned. If either condition isn't met, it will either
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* result in a data abort or incorrect results. */
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static inline int32_t vector_sp_add(int16_t* v1, int16_t* f2, int16_t* s2)
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{
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int res;
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#if ORDER > 32
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int cnt = ORDER>>5;
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#endif
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asm volatile (
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"tst %[v2], #2 \n"
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"beq 20f \n"
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"10: \n"
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"bic %[v2], %[v2], #2 \n"
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"ldmia %[v2]!, {r4-r5} \n"
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"1: \n"
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".rept " ADD_SUB_BLOCKS "\n"
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"ldmia %[v2]!, {r6-r7} \n"
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"ldmia %[v1], {r0-r3} \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r4, r5, r4, asr #16 \n"
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"ssub16 r0, r0, r4 \n"
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"pkhbt r5, r5, r6, lsl #16 \n"
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"ssub16 r1, r1, r5 \n"
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"ldmia %[v2]!, {r4-r5} \n"
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"mov r7, r7, ror #16 \n"
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"pkhtb r6, r7, r6, asr #16 \n"
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"ssub16 r2, r2, r6 \n"
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"pkhbt r7, r7, r4, lsl #16 \n"
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"ssub16 r3, r3, r7 \n"
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"stmia %[v1]!, {r0-r3} \n"
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".endr \n"
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#if ORDER > 32
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"subs %[cnt], %[cnt], #1 \n"
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"bne 1b \n"
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"mov %[res], #0 \n"
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#endif
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"b 99f \n"
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"tst %[f2], #2 \n"
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"beq 20f \n"
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"20: \n"
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"1: \n"
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".rept " ADD_SUB_BLOCKS "\n"
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"ldmia %[v2]!, {r4-r7} \n"
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"ldmia %[v1], {r0-r3} \n"
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"ssub16 r0, r0, r4 \n"
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"ssub16 r1, r1, r5 \n"
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"ssub16 r2, r2, r6 \n"
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"ssub16 r3, r3, r7 \n"
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"stmia %[v1]!, {r0-r3} \n"
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".endr \n"
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"10: \n"
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"ldrh r3, [%[f2]], #2 \n"
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"ldrh r6, [%[s2]], #2 \n"
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"ldmia %[f2]!, {r2,r4} \n"
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"mov r3, r3, lsl #16 \n"
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"mov r6, r6, lsl #16 \n"
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"1: \n"
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"ldmia %[s2]!, {r5,r7} \n"
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"pkhtb r3, r3, r2 \n"
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"pkhtb r2, r2, r4 \n"
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"ldrd r0, [%[v1]] \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r6, r5, r6, asr #16 \n"
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"pkhbt r5, r5, r7, lsl #16 \n"
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#if ORDER > 32
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"subs %[cnt], %[cnt], #1 \n"
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"bne 1b \n"
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"smladx %[res], r0, r3, %[res] \n"
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#else
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"smuadx %[res], r0, r3 \n"
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#endif
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"smladx %[res], r1, r2, %[res] \n"
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"ldmia %[f2]!, {r2,r3} \n"
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"sadd16 r0, r0, r6 \n"
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"sadd16 r1, r1, r5 \n"
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"strd r0, [%[v1]], #8 \n"
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".rept " BLOCK_REPEAT "\n"
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"ldmia %[s2]!, {r5,r6} \n"
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"pkhtb r4, r4, r2 \n"
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"pkhtb r2, r2, r3 \n"
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"ldrd r0, [%[v1]] \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r7, r5, r7, asr #16 \n"
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"pkhbt r5, r5, r6, lsl #16 \n"
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"smladx %[res], r0, r4, %[res] \n"
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"smladx %[res], r1, r2, %[res] \n"
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"ldmia %[f2]!, {r2,r4} \n"
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"sadd16 r0, r0, r7 \n"
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"sadd16 r1, r1, r5 \n"
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"strd r0, [%[v1]], #8 \n"
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"ldmia %[s2]!, {r5,r7} \n"
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"pkhtb r3, r3, r2 \n"
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"pkhtb r2, r2, r4 \n"
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"ldrd r0, [%[v1]] \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r6, r5, r6, asr #16 \n"
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"pkhbt r5, r5, r7, lsl #16 \n"
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"smladx %[res], r0, r3, %[res] \n"
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"smladx %[res], r1, r2, %[res] \n"
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"ldmia %[f2]!, {r2,r3} \n"
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"sadd16 r0, r0, r6 \n"
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"sadd16 r1, r1, r5 \n"
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"strd r0, [%[v1]], #8 \n"
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".endr \n"
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"ldmia %[s2]!, {r5,r6} \n"
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"pkhtb r4, r4, r2 \n"
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"pkhtb r2, r2, r3 \n"
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"ldrd r0, [%[v1]] \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r7, r5, r7, asr #16 \n"
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"pkhbt r5, r5, r6, lsl #16 \n"
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"smladx %[res], r0, r4, %[res] \n"
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"smladx %[res], r1, r2, %[res] \n"
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#if ORDER > 32
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"subs %[cnt], %[cnt], #1 \n"
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"ldmneia %[f2]!, {r2,r4} \n"
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"sadd16 r0, r0, r7 \n"
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"sadd16 r1, r1, r5 \n"
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"strd r0, [%[v1]], #8 \n"
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"bne 1b \n"
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#else
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"sadd16 r0, r0, r7 \n"
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"sadd16 r1, r1, r5 \n"
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"strd r0, [%[v1]], #8 \n"
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#endif
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"99: \n"
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"b 99f \n"
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"20: \n"
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"ldrd r4, [%[f2]], #8 \n"
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"ldrd r0, [%[v1]] \n"
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#if ORDER > 32
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"1: \n"
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"smlad %[res], r0, r4, %[res] \n"
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#else
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"smuad %[res], r0, r4 \n"
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#endif
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"ldrd r6, [%[s2]], #8 \n"
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"smlad %[res], r1, r5, %[res] \n"
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"ldrd r4, [%[f2]], #8 \n"
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"ldrd r2, [%[v1], #8] \n"
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"sadd16 r0, r0, r6 \n"
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"sadd16 r1, r1, r7 \n"
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"strd r0, [%[v1]], #8 \n"
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".rept " BLOCK_REPEAT "\n"
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"smlad %[res], r2, r4, %[res] \n"
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"ldrd r6, [%[s2]], #8 \n"
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"smlad %[res], r3, r5, %[res] \n"
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"ldrd r4, [%[f2]], #8 \n"
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"ldrd r0, [%[v1], #8] \n"
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"sadd16 r2, r2, r6 \n"
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"sadd16 r3, r3, r7 \n"
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"strd r2, [%[v1]], #8 \n"
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"smlad %[res], r0, r4, %[res] \n"
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"ldrd r6, [%[s2]], #8 \n"
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"smlad %[res], r1, r5, %[res] \n"
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"ldrd r4, [%[f2]], #8 \n"
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"ldrd r2, [%[v1], #8] \n"
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"sadd16 r0, r0, r6 \n"
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"sadd16 r1, r1, r7 \n"
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"strd r0, [%[v1]], #8 \n"
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".endr \n"
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"smlad %[res], r2, r4, %[res] \n"
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"ldrd r6, [%[s2]], #8 \n"
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"smlad %[res], r3, r5, %[res] \n"
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#if ORDER > 32
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"subs %[cnt], %[cnt], #1 \n"
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"ldrned r4, [%[f2]], #8 \n"
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"ldrned r0, [%[v1], #8] \n"
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"sadd16 r2, r2, r6 \n"
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"sadd16 r3, r3, r7 \n"
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"strd r2, [%[v1]], #8 \n"
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"bne 1b \n"
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#else
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"sadd16 r2, r2, r6 \n"
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"sadd16 r3, r3, r7 \n"
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"strd r2, [%[v1]], #8 \n"
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#endif
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"99: \n"
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: /* outputs */
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#if ORDER > 32
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[cnt]"+r"(cnt),
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#endif
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[v1] "+r"(v1),
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[v2] "+r"(v2)
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[f2] "+r"(f2),
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[s2] "+r"(s2),
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[res]"=r"(res)
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: /* inputs */
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: /* clobbers */
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"r0", "r1", "r2", "r3", "r4",
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"r5", "r6", "r7", "memory"
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);
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return res;
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}
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/* Calculate scalarproduct, then subtract a 2nd vector (fused for performance)
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* This version fetches data as 32 bit words, and *requires* v1 to be
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* 32 bit aligned. It also requires that f2 and s2 are either both 32 bit
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* aligned or both unaligned. If either condition isn't met, it will either
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* result in a data abort or incorrect results. */
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static inline int32_t vector_sp_sub(int16_t* v1, int16_t* f2, int16_t* s2)
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{
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int res;
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#if ORDER > 32
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int cnt = ORDER>>5;
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#endif
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asm volatile (
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#if ORDER > 32
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"mov %[res], #0 \n"
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#endif
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"tst %[f2], #2 \n"
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"beq 20f \n"
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"10: \n"
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"ldrh r3, [%[f2]], #2 \n"
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"ldrh r6, [%[s2]], #2 \n"
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"ldmia %[f2]!, {r2,r4} \n"
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"mov r3, r3, lsl #16 \n"
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"mov r6, r6, lsl #16 \n"
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"1: \n"
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"ldmia %[s2]!, {r5,r7} \n"
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"pkhtb r3, r3, r2 \n"
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"pkhtb r2, r2, r4 \n"
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"ldrd r0, [%[v1]] \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r6, r5, r6, asr #16 \n"
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"pkhbt r5, r5, r7, lsl #16 \n"
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#if ORDER > 32
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"smladx %[res], r0, r3, %[res] \n"
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#else
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"smuadx %[res], r0, r3 \n"
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#endif
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"smladx %[res], r1, r2, %[res] \n"
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"ldmia %[f2]!, {r2,r3} \n"
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"ssub16 r0, r0, r6 \n"
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"ssub16 r1, r1, r5 \n"
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"strd r0, [%[v1]], #8 \n"
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".rept " BLOCK_REPEAT "\n"
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"ldmia %[s2]!, {r5,r6} \n"
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"pkhtb r4, r4, r2 \n"
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"pkhtb r2, r2, r3 \n"
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"ldrd r0, [%[v1]] \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r7, r5, r7, asr #16 \n"
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"pkhbt r5, r5, r6, lsl #16 \n"
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"smladx %[res], r0, r4, %[res] \n"
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"smladx %[res], r1, r2, %[res] \n"
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"ldmia %[f2]!, {r2,r4} \n"
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"ssub16 r0, r0, r7 \n"
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"ssub16 r1, r1, r5 \n"
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"strd r0, [%[v1]], #8 \n"
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"ldmia %[s2]!, {r5,r7} \n"
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"pkhtb r3, r3, r2 \n"
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"pkhtb r2, r2, r4 \n"
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"ldrd r0, [%[v1]] \n"
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"mov r5, r5, ror #16 \n"
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"pkhtb r6, r5, r6, asr #16 \n"
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"pkhbt r5, r5, r7, lsl #16 \n"
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"smladx %[res], r0, r3, %[res] \n"
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"smladx %[res], r1, r2, %[res] \n"
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"ldmia %[f2]!, {r2,r3} \n"
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"ssub16 r0, r0, r6 \n"
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"ssub16 r1, r1, r5 \n"
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"strd r0, [%[v1]], #8 \n"
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".endr \n"
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"ldmia %[s2]!, {r5,r6} \n"
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"pkhtb r4, r4, r2 \n"
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"pkhtb r2, r2, r3 \n"
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"ldrd r0, [%[v1]] \n"
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"mov r5, r5, ror #16 \n"
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||||
"pkhtb r7, r5, r7, asr #16 \n"
|
||||
"pkhbt r5, r5, r6, lsl #16 \n"
|
||||
"smladx %[res], r0, r4, %[res] \n"
|
||||
"smladx %[res], r1, r2, %[res] \n"
|
||||
#if ORDER > 32
|
||||
"subs %[cnt], %[cnt], #1 \n"
|
||||
"ldmneia %[f2]!, {r2,r4} \n"
|
||||
"ssub16 r0, r0, r7 \n"
|
||||
"ssub16 r1, r1, r5 \n"
|
||||
"strd r0, [%[v1]], #8 \n"
|
||||
"bne 1b \n"
|
||||
#else
|
||||
"ssub16 r0, r0, r7 \n"
|
||||
"ssub16 r1, r1, r5 \n"
|
||||
"strd r0, [%[v1]], #8 \n"
|
||||
#endif
|
||||
|
||||
"b 99f \n"
|
||||
|
||||
"20: \n"
|
||||
"ldrd r4, [%[f2]], #8 \n"
|
||||
"ldrd r0, [%[v1]] \n"
|
||||
|
||||
#if ORDER > 32
|
||||
"1: \n"
|
||||
"smlad %[res], r0, r4, %[res] \n"
|
||||
#else
|
||||
"smuad %[res], r0, r4 \n"
|
||||
#endif
|
||||
"ldrd r6, [%[s2]], #8 \n"
|
||||
"smlad %[res], r1, r5, %[res] \n"
|
||||
"ldrd r4, [%[f2]], #8 \n"
|
||||
"ldrd r2, [%[v1], #8] \n"
|
||||
"ssub16 r0, r0, r6 \n"
|
||||
"ssub16 r1, r1, r7 \n"
|
||||
"strd r0, [%[v1]], #8 \n"
|
||||
|
||||
".rept " BLOCK_REPEAT "\n"
|
||||
"smlad %[res], r2, r4, %[res] \n"
|
||||
"ldrd r6, [%[s2]], #8 \n"
|
||||
"smlad %[res], r3, r5, %[res] \n"
|
||||
"ldrd r4, [%[f2]], #8 \n"
|
||||
"ldrd r0, [%[v1], #8] \n"
|
||||
"ssub16 r2, r2, r6 \n"
|
||||
"ssub16 r3, r3, r7 \n"
|
||||
"strd r2, [%[v1]], #8 \n"
|
||||
"smlad %[res], r0, r4, %[res] \n"
|
||||
"ldrd r6, [%[s2]], #8 \n"
|
||||
"smlad %[res], r1, r5, %[res] \n"
|
||||
"ldrd r4, [%[f2]], #8 \n"
|
||||
"ldrd r2, [%[v1], #8] \n"
|
||||
"ssub16 r0, r0, r6 \n"
|
||||
"ssub16 r1, r1, r7 \n"
|
||||
"strd r0, [%[v1]], #8 \n"
|
||||
".endr \n"
|
||||
|
||||
"smlad %[res], r2, r4, %[res] \n"
|
||||
"ldrd r6, [%[s2]], #8 \n"
|
||||
"smlad %[res], r3, r5, %[res] \n"
|
||||
#if ORDER > 32
|
||||
"subs %[cnt], %[cnt], #1 \n"
|
||||
"ldrned r4, [%[f2]], #8 \n"
|
||||
"ldrned r0, [%[v1], #8] \n"
|
||||
"ssub16 r2, r2, r6 \n"
|
||||
"ssub16 r3, r3, r7 \n"
|
||||
"strd r2, [%[v1]], #8 \n"
|
||||
"bne 1b \n"
|
||||
#else
|
||||
"ssub16 r2, r2, r6 \n"
|
||||
"ssub16 r3, r3, r7 \n"
|
||||
"strd r2, [%[v1]], #8 \n"
|
||||
#endif
|
||||
|
||||
"99: \n"
|
||||
: /* outputs */
|
||||
#if ORDER > 32
|
||||
[cnt]"+r"(cnt),
|
||||
#endif
|
||||
[v1] "+r"(v1),
|
||||
[f2] "+r"(f2),
|
||||
[s2] "+r"(s2),
|
||||
[res]"=r"(res)
|
||||
: /* inputs */
|
||||
: /* clobbers */
|
||||
"r0", "r1", "r2", "r3", "r4",
|
||||
"r5", "r6", "r7", "memory"
|
||||
);
|
||||
return res;
|
||||
}
|
||||
|
||||
/* This version fetches data as 32 bit words, and *requires* v1 to be
|
||||
|
|
@ -178,12 +380,6 @@ static inline int32_t scalarproduct(int16_t* v1, int16_t* v2)
|
|||
int cnt = ORDER>>5;
|
||||
#endif
|
||||
|
||||
#if ORDER > 16
|
||||
#define MLA_BLOCKS "3"
|
||||
#else
|
||||
#define MLA_BLOCKS "1"
|
||||
#endif
|
||||
|
||||
asm volatile (
|
||||
#if ORDER > 32
|
||||
"mov %[res], #0 \n"
|
||||
|
|
@ -194,80 +390,85 @@ static inline int32_t scalarproduct(int16_t* v1, int16_t* v2)
|
|||
"10: \n"
|
||||
"bic %[v2], %[v2], #2 \n"
|
||||
"ldmia %[v2]!, {r5-r7} \n"
|
||||
"ldmia %[v1]!, {r0-r1} \n"
|
||||
"1: \n"
|
||||
"pkhbt r8, r6, r5 \n"
|
||||
"ldmia %[v2]!, {r4-r5} \n"
|
||||
#if ORDER > 32
|
||||
"smladx %[res], r0, r8, %[res] \n"
|
||||
#else
|
||||
"smuadx %[res], r0, r8 \n"
|
||||
#endif
|
||||
".rept " MLA_BLOCKS "\n"
|
||||
"pkhbt r8, r7, r6 \n"
|
||||
"ldmia %[v1]!, {r2-r3} \n"
|
||||
"smladx %[res], r1, r8, %[res] \n"
|
||||
"pkhbt r8, r4, r7 \n"
|
||||
"ldmia %[v2]!, {r6-r7} \n"
|
||||
"smladx %[res], r2, r8, %[res] \n"
|
||||
"pkhbt r8, r5, r4 \n"
|
||||
"ldmia %[v1]!, {r0-r1} \n"
|
||||
"smladx %[res], r3, r8, %[res] \n"
|
||||
"pkhbt r8, r6, r5 \n"
|
||||
"ldmia %[v2]!, {r4-r5} \n"
|
||||
"smladx %[res], r0, r8, %[res] \n"
|
||||
".endr \n"
|
||||
"ldrd r0, [%[v1]], #8 \n"
|
||||
|
||||
"pkhbt r8, r7, r6 \n"
|
||||
"ldmia %[v1]!, {r2-r3} \n"
|
||||
"smladx %[res], r1, r8, %[res] \n"
|
||||
"pkhbt r8, r4, r7 \n"
|
||||
"1: \n"
|
||||
"pkhtb r3, r5, r6 \n"
|
||||
"ldrd r4, [%[v2]], #8 \n"
|
||||
#if ORDER > 32
|
||||
"smladx %[res], r0, r3, %[res] \n"
|
||||
#else
|
||||
"smuadx %[res], r0, r3 \n"
|
||||
#endif
|
||||
".rept " BLOCK_REPEAT "\n"
|
||||
"pkhtb r0, r6, r7 \n"
|
||||
"ldrd r2, [%[v1]], #8 \n"
|
||||
"smladx %[res], r1, r0, %[res] \n"
|
||||
"pkhtb r1, r7, r4 \n"
|
||||
"ldrd r6, [%[v2]], #8 \n"
|
||||
"smladx %[res], r2, r1, %[res] \n"
|
||||
"pkhtb r2, r4, r5 \n"
|
||||
"ldrd r0, [%[v1]], #8 \n"
|
||||
"smladx %[res], r3, r2, %[res] \n"
|
||||
"pkhtb r3, r5, r6 \n"
|
||||
"ldrd r4, [%[v2]], #8 \n"
|
||||
"smladx %[res], r0, r3, %[res] \n"
|
||||
".endr \n"
|
||||
|
||||
"pkhtb r0, r6, r7 \n"
|
||||
"ldrd r2, [%[v1]], #8 \n"
|
||||
"smladx %[res], r1, r0, %[res] \n"
|
||||
"pkhtb r1, r7, r4 \n"
|
||||
#if ORDER > 32
|
||||
"subs %[cnt], %[cnt], #1 \n"
|
||||
"ldmneia %[v2]!, {r6-r7} \n"
|
||||
"smladx %[res], r2, r8, %[res] \n"
|
||||
"pkhbt r8, r5, r4 \n"
|
||||
"ldmneia %[v1]!, {r0-r1} \n"
|
||||
"smladx %[res], r3, r8, %[res] \n"
|
||||
"ldrned r6, [%[v2]], #8 \n"
|
||||
"smladx %[res], r2, r1, %[res] \n"
|
||||
"pkhtb r2, r4, r5 \n"
|
||||
"ldrned r0, [%[v1]], #8 \n"
|
||||
"smladx %[res], r3, r2, %[res] \n"
|
||||
"bne 1b \n"
|
||||
#else
|
||||
"pkhbt r5, r5, r4 \n"
|
||||
"smladx %[res], r2, r8, %[res] \n"
|
||||
"smladx %[res], r3, r5, %[res] \n"
|
||||
"pkhtb r4, r4, r5 \n"
|
||||
"smladx %[res], r2, r1, %[res] \n"
|
||||
"smladx %[res], r3, r4, %[res] \n"
|
||||
#endif
|
||||
"b 99f \n"
|
||||
|
||||
"b 99f \n"
|
||||
|
||||
"20: \n"
|
||||
"ldmia %[v1]!, {r0-r1} \n"
|
||||
"ldrd r0, [%[v1]], #8 \n"
|
||||
"ldmia %[v2]!, {r5-r7} \n"
|
||||
|
||||
"1: \n"
|
||||
"ldmia %[v1]!, {r2-r3} \n"
|
||||
"ldrd r2, [%[v1]], #8 \n"
|
||||
#if ORDER > 32
|
||||
"smlad %[res], r0, r5, %[res] \n"
|
||||
#else
|
||||
"smuad %[res], r0, r5 \n"
|
||||
#endif
|
||||
".rept " MLA_BLOCKS "\n"
|
||||
"ldmia %[v2]!, {r4-r5} \n"
|
||||
".rept " BLOCK_REPEAT "\n"
|
||||
"ldrd r4, [%[v2]], #8 \n"
|
||||
"smlad %[res], r1, r6, %[res] \n"
|
||||
"ldmia %[v1]!, {r0-r1} \n"
|
||||
"ldrd r0, [%[v1]], #8 \n"
|
||||
"smlad %[res], r2, r7, %[res] \n"
|
||||
"ldmia %[v2]!, {r6-r7} \n"
|
||||
"ldrd r6, [%[v2]], #8 \n"
|
||||
"smlad %[res], r3, r4, %[res] \n"
|
||||
"ldmia %[v1]!, {r2-r3} \n"
|
||||
"ldrd r2, [%[v1]], #8 \n"
|
||||
"smlad %[res], r0, r5, %[res] \n"
|
||||
".endr \n"
|
||||
|
||||
"ldmia %[v2]!, {r4-r5} \n"
|
||||
"smlad %[res], r1, r6, %[res] \n"
|
||||
#if ORDER > 32
|
||||
"ldrd r4, [%[v2]], #8 \n"
|
||||
"smlad %[res], r1, r6, %[res] \n"
|
||||
"subs %[cnt], %[cnt], #1 \n"
|
||||
"ldmneia %[v1]!, {r0-r1} \n"
|
||||
"ldrned r0, [%[v1]], #8 \n"
|
||||
"smlad %[res], r2, r7, %[res] \n"
|
||||
"ldmneia %[v2]!, {r6-r7} \n"
|
||||
"ldrned r6, [%[v2]], #8 \n"
|
||||
"smlad %[res], r3, r4, %[res] \n"
|
||||
"bne 1b \n"
|
||||
#else
|
||||
"ldr r4, [%[v2]], #4 \n"
|
||||
"smlad %[res], r1, r6, %[res] \n"
|
||||
"smlad %[res], r2, r7, %[res] \n"
|
||||
"smlad %[res], r3, r4, %[res] \n"
|
||||
#endif
|
||||
|
|
@ -282,8 +483,8 @@ static inline int32_t scalarproduct(int16_t* v1, int16_t* v2)
|
|||
[res]"=r"(res)
|
||||
: /* inputs */
|
||||
: /* clobbers */
|
||||
"r0", "r1", "r2", "r3", "r4",
|
||||
"r5", "r6", "r7", "r8"
|
||||
"r0", "r1", "r2", "r3",
|
||||
"r4", "r5", "r6", "r7"
|
||||
);
|
||||
return res;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue