forked from len0rd/rockbox
M:Robe 500: RTC is now working, Added some SPI flexibility per end device and modified the interrupt handler for the tsc2100 which should make it more reliable.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21483 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
parent
1910d026b1
commit
19cb444691
6 changed files with 44 additions and 27 deletions
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@ -36,8 +36,7 @@ void rtc_init(void)
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int rtc_read_datetime(unsigned char* buf)
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{
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char command = ADDR_READ|ADDR_BURST; /* burst read from the start of the time/date reg */
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spi_block_transfer(SPI_target_RX5X348AB, true,
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&command, 1, buf, 7);
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spi_block_transfer(SPI_target_RX5X348AB, &command, 1, buf, 7);
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return 1;
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}
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int rtc_write_datetime(unsigned char* buf)
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@ -48,7 +47,6 @@ int rtc_write_datetime(unsigned char* buf)
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data[0] = command;
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for (i=1;i<8;i++)
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data[i] = buf[i-1];
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spi_block_transfer(SPI_target_RX5X348AB, true,
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data, 8, NULL, 0);
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spi_block_transfer(SPI_target_RX5X348AB, data, 8, NULL, 0);
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return 1;
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}
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@ -44,7 +44,7 @@ void tsc2100_read_data(void)
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adc_last_read=current_tick;
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spi_block_transfer(SPI_target_TSC2100, false,
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spi_block_transfer(SPI_target_TSC2100,
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out, sizeof(out), (char *)adc_data, sizeof(adc_data));
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for(i=0; i<sizeof(adc_data); i+=2)
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@ -128,8 +128,7 @@ short tsc2100_readreg(int page, int address)
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unsigned short command = 0x8000|(page << 11)|(address << 5);
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unsigned char out[] = {command >> 8, command & 0xff};
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unsigned char in[2];
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spi_block_transfer(SPI_target_TSC2100, false,
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out, sizeof(out), in, sizeof(in));
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spi_block_transfer(SPI_target_TSC2100, out, sizeof(out), in, sizeof(in));
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return (in[0]<<8)|in[1];
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}
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@ -139,8 +138,7 @@ void tsc2100_writereg(int page, int address, short value)
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unsigned short command = (page << 11)|(address << 5);
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unsigned char out[4] = {command >> 8, command & 0xff,
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value >> 8, value & 0xff};
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spi_block_transfer(SPI_target_TSC2100, false,
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out, sizeof(out), NULL, 0);
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spi_block_transfer(SPI_target_TSC2100, out, sizeof(out), NULL, 0);
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}
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void tsc2100_keyclick(void)
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@ -38,6 +38,9 @@ void adc_init(void)
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/* Touchscreen data available interupt */
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void GIO14(void)
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{
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/* Interrupts work properly when cleared first */
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IO_INTC_IRQ2 = (1<<3); /* IRQ_GIO14 == 35 */
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short tsadc = tsc2100_readreg(TSADC_PAGE, TSADC_ADDRESS);
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short adscm = (tsadc&TSADC_ADSCM_MASK)>>TSADC_ADSCM_SHIFT;
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@ -62,8 +65,6 @@ void GIO14(void)
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case 0x0B:
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tsc2100_set_mode(true, 0x01);
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break;
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}
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IO_INTC_IRQ2 = (1<<3); /* IRQ_GIO14 == 35 */
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}
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}
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@ -29,10 +29,17 @@
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#include "spi-target.h"
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#include "lcd-target.h"
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short read_brightness = 0x0;
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static void _backlight_write_brightness(int brightness)
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{
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uint8_t bl_command[] = {0xa4, 0x00, brightness, 0xbb};
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spi_block_transfer(SPI_target_BACKLIGHT, false, bl_command, 4, 0, 0);
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uint8_t bl_command[] = {0xA4, 0x00, brightness, 0xA4};
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uint8_t bl_read[] = {0xA8, 0x00};
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spi_block_transfer(SPI_target_BACKLIGHT, bl_read, 2, (char*)&read_brightness, 2);
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spi_block_transfer(SPI_target_BACKLIGHT, bl_command, 4, 0, 0);
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}
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void _backlight_on(void)
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@ -39,16 +39,24 @@ struct SPI_info {
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volatile unsigned short *setreg;
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volatile unsigned short *clrreg;
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int bit;
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bool idle_low;
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char divider;
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};
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struct SPI_info spi_targets[] =
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{
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#ifndef CREATIVE_ZVx
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[SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_TS_ENABLE },
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[SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0, GIO_RTC_ENABLE},
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[SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_BL_ENABLE },
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[SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1,
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GIO_TS_ENABLE, true, 0x07},
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/* RTC seems to have timing problems if the CLK idles low */
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[SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0,
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GIO_RTC_ENABLE, false, 0x3F},
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/* This appears to work properly idleing low, idling high is very glitchy */
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[SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1,
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GIO_BL_ENABLE, true, 0x07},
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#else
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[SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2, GIO_LCD_ENABLE},
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[SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2,
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GIO_LCD_ENABLE, true, 0x07},
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#endif
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};
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@ -65,22 +73,27 @@ static void spi_disable_all_targets(void)
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}
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int spi_block_transfer(enum SPI_target target,
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const bool spi_msb_first,
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const uint8_t *tx_bytes, unsigned int tx_size,
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uint8_t *rx_bytes, unsigned int rx_size)
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{
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mutex_lock(&spi_mtx);
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IO_SERIAL0_MODE = (IO_SERIAL0_MODE& ~(spi_msb_first<<9))|(spi_msb_first<<9);
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IO_SERIAL0_MODE &= ~(1<<10);
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IO_SERIAL0_MODE |= (spi_targets[target].idle_low << 10);
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IO_SERIAL0_MODE &= ~(0xFF);
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IO_SERIAL0_MODE |= spi_targets[target].divider;
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/* Activate the slave select pin */
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*spi_targets[target].setreg = spi_targets[target].bit;
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if(tx_size) {
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IO_SERIAL0_TX_ENABLE = 0x0001;
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*spi_targets[target].setreg = spi_targets[target].bit;
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}
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while (tx_size--)
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{
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/* Send one byte */
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IO_SERIAL0_TX_DATA = *tx_bytes++;
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/* Wait until transfer finished */
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while (IO_SERIAL0_RX_DATA & IO_SERIAL0_XMIT);
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}
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@ -106,8 +119,8 @@ int spi_block_transfer(enum SPI_target target,
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void spi_init(void)
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{
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mutex_init(&spi_mtx);
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IO_SERIAL0_MODE = 0x3607;
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IO_SERIAL0_MODE = 0x2200 | 0x3F;
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/* Enable TX */
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IO_SERIAL0_TX_ENABLE = 0x0001;
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#ifndef CREATIVE_ZVx
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@ -115,7 +128,8 @@ void spi_init(void)
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IO_GIO_DIR1 &= ~GIO_TS_ENABLE;
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/* Set GIO 12 to output for rtc slave enable */
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IO_GIO_DIR0 &= ~GIO_RTC_ENABLE;
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#endif
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spi_disable_all_targets(); /* make sure only one is ever enabled at a time */
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#endif
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/* make sure only one is ever enabled at a time */
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spi_disable_all_targets();
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}
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@ -38,7 +38,6 @@ enum SPI_target {
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void spi_init(void);
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int spi_block_transfer(enum SPI_target target,
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const bool spi_msb_first,
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const uint8_t *tx_bytes, unsigned int tx_size,
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uint8_t *rx_bytes, unsigned int rx_size);
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