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M:Robe 500: RTC is now working, Added some SPI flexibility per end device and modified the interrupt handler for the tsc2100 which should make it more reliable.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21483 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Karl Kurbjun 2009-06-24 04:17:15 +00:00
parent 1910d026b1
commit 19cb444691
6 changed files with 44 additions and 27 deletions
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6
firmware/drivers/rtc/rtc_rx5x348ab.c
View file

@ -36,8 +36,7 @@ void rtc_init(void)
int rtc_read_datetime(unsigned char* buf) int rtc_read_datetime(unsigned char* buf)
{ {
char command = ADDR_READ|ADDR_BURST; /* burst read from the start of the time/date reg */ char command = ADDR_READ|ADDR_BURST; /* burst read from the start of the time/date reg */
spi_block_transfer(SPI_target_RX5X348AB, true, spi_block_transfer(SPI_target_RX5X348AB, &command, 1, buf, 7);
&command, 1, buf, 7);
return 1; return 1;
} }
int rtc_write_datetime(unsigned char* buf) int rtc_write_datetime(unsigned char* buf)
@ -48,7 +47,6 @@ int rtc_write_datetime(unsigned char* buf)
data[0] = command; data[0] = command;
for (i=1;i<8;i++) for (i=1;i<8;i++)
data[i] = buf[i-1]; data[i] = buf[i-1];
spi_block_transfer(SPI_target_RX5X348AB, true, spi_block_transfer(SPI_target_RX5X348AB, data, 8, NULL, 0);
data, 8, NULL, 0);
return 1; return 1;
} }

8
firmware/drivers/tsc2100.c
View file

@ -44,7 +44,7 @@ void tsc2100_read_data(void)
adc_last_read=current_tick; adc_last_read=current_tick;
spi_block_transfer(SPI_target_TSC2100, false, spi_block_transfer(SPI_target_TSC2100,
out, sizeof(out), (char *)adc_data, sizeof(adc_data)); out, sizeof(out), (char *)adc_data, sizeof(adc_data));
for(i=0; i<sizeof(adc_data); i+=2) for(i=0; i<sizeof(adc_data); i+=2)
@ -128,8 +128,7 @@ short tsc2100_readreg(int page, int address)
unsigned short command = 0x8000|(page << 11)|(address << 5); unsigned short command = 0x8000|(page << 11)|(address << 5);
unsigned char out[] = {command >> 8, command & 0xff}; unsigned char out[] = {command >> 8, command & 0xff};
unsigned char in[2]; unsigned char in[2];
spi_block_transfer(SPI_target_TSC2100, false, spi_block_transfer(SPI_target_TSC2100, out, sizeof(out), in, sizeof(in));
out, sizeof(out), in, sizeof(in));
return (in[0]<<8)|in[1]; return (in[0]<<8)|in[1];
} }
@ -139,8 +138,7 @@ void tsc2100_writereg(int page, int address, short value)
unsigned short command = (page << 11)|(address << 5); unsigned short command = (page << 11)|(address << 5);
unsigned char out[4] = {command >> 8, command & 0xff, unsigned char out[4] = {command >> 8, command & 0xff,
value >> 8, value & 0xff}; value >> 8, value & 0xff};
spi_block_transfer(SPI_target_TSC2100, false, spi_block_transfer(SPI_target_TSC2100, out, sizeof(out), NULL, 0);
out, sizeof(out), NULL, 0);
} }
void tsc2100_keyclick(void) void tsc2100_keyclick(void)

7
firmware/target/arm/tms320dm320/mrobe-500/adc-mr500.c
View file

@ -38,6 +38,9 @@ void adc_init(void)
/* Touchscreen data available interupt */ /* Touchscreen data available interupt */
void GIO14(void) void GIO14(void)
{ {
/* Interrupts work properly when cleared first */
IO_INTC_IRQ2 = (1<<3); /* IRQ_GIO14 == 35 */
short tsadc = tsc2100_readreg(TSADC_PAGE, TSADC_ADDRESS); short tsadc = tsc2100_readreg(TSADC_PAGE, TSADC_ADDRESS);
short adscm = (tsadc&TSADC_ADSCM_MASK)>>TSADC_ADSCM_SHIFT; short adscm = (tsadc&TSADC_ADSCM_MASK)>>TSADC_ADSCM_SHIFT;
@ -62,8 +65,6 @@ void GIO14(void)
case 0x0B: case 0x0B:
tsc2100_set_mode(true, 0x01); tsc2100_set_mode(true, 0x01);
break; break;
} }
IO_INTC_IRQ2 = (1<<3); /* IRQ_GIO14 == 35 */
} }

11
firmware/target/arm/tms320dm320/mrobe-500/backlight-mr500.c
View file

@ -29,10 +29,17 @@
#include "spi-target.h" #include "spi-target.h"
#include "lcd-target.h" #include "lcd-target.h"
short read_brightness = 0x0;
static void _backlight_write_brightness(int brightness) static void _backlight_write_brightness(int brightness)
{ {
uint8_t bl_command[] = {0xa4, 0x00, brightness, 0xbb}; uint8_t bl_command[] = {0xA4, 0x00, brightness, 0xA4};
spi_block_transfer(SPI_target_BACKLIGHT, false, bl_command, 4, 0, 0);
uint8_t bl_read[] = {0xA8, 0x00};
spi_block_transfer(SPI_target_BACKLIGHT, bl_read, 2, (char*)&read_brightness, 2);
spi_block_transfer(SPI_target_BACKLIGHT, bl_command, 4, 0, 0);
} }
void _backlight_on(void) void _backlight_on(void)

38
firmware/target/arm/tms320dm320/spi-dm320.c
View file

@ -39,16 +39,24 @@ struct SPI_info {
volatile unsigned short *setreg; volatile unsigned short *setreg;
volatile unsigned short *clrreg; volatile unsigned short *clrreg;
int bit; int bit;
bool idle_low;
char divider;
}; };
struct SPI_info spi_targets[] = struct SPI_info spi_targets[] =
{ {
#ifndef CREATIVE_ZVx #ifndef CREATIVE_ZVx
[SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_TS_ENABLE }, [SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1,
[SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0, GIO_RTC_ENABLE}, GIO_TS_ENABLE, true, 0x07},
[SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_BL_ENABLE }, /* RTC seems to have timing problems if the CLK idles low */
[SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0,
GIO_RTC_ENABLE, false, 0x3F},
/* This appears to work properly idleing low, idling high is very glitchy */
[SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1,
GIO_BL_ENABLE, true, 0x07},
#else #else
[SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2, GIO_LCD_ENABLE}, [SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2,
GIO_LCD_ENABLE, true, 0x07},
#endif #endif
}; };
@ -65,22 +73,27 @@ static void spi_disable_all_targets(void)
} }
int spi_block_transfer(enum SPI_target target, int spi_block_transfer(enum SPI_target target,
const bool spi_msb_first,
const uint8_t *tx_bytes, unsigned int tx_size, const uint8_t *tx_bytes, unsigned int tx_size,
uint8_t *rx_bytes, unsigned int rx_size) uint8_t *rx_bytes, unsigned int rx_size)
{ {
mutex_lock(&spi_mtx); mutex_lock(&spi_mtx);
IO_SERIAL0_MODE = (IO_SERIAL0_MODE& ~(spi_msb_first<<9))|(spi_msb_first<<9); IO_SERIAL0_MODE &= ~(1<<10);
IO_SERIAL0_MODE |= (spi_targets[target].idle_low << 10);
IO_SERIAL0_MODE &= ~(0xFF);
IO_SERIAL0_MODE |= spi_targets[target].divider;
/* Activate the slave select pin */ /* Activate the slave select pin */
*spi_targets[target].setreg = spi_targets[target].bit; if(tx_size) {
IO_SERIAL0_TX_ENABLE = 0x0001;
*spi_targets[target].setreg = spi_targets[target].bit;
}
while (tx_size--) while (tx_size--)
{ {
/* Send one byte */ /* Send one byte */
IO_SERIAL0_TX_DATA = *tx_bytes++; IO_SERIAL0_TX_DATA = *tx_bytes++;
/* Wait until transfer finished */ /* Wait until transfer finished */
while (IO_SERIAL0_RX_DATA & IO_SERIAL0_XMIT); while (IO_SERIAL0_RX_DATA & IO_SERIAL0_XMIT);
} }
@ -106,8 +119,8 @@ int spi_block_transfer(enum SPI_target target,
void spi_init(void) void spi_init(void)
{ {
mutex_init(&spi_mtx); mutex_init(&spi_mtx);
IO_SERIAL0_MODE = 0x3607; IO_SERIAL0_MODE = 0x2200 | 0x3F;
/* Enable TX */ /* Enable TX */
IO_SERIAL0_TX_ENABLE = 0x0001; IO_SERIAL0_TX_ENABLE = 0x0001;
#ifndef CREATIVE_ZVx #ifndef CREATIVE_ZVx
@ -115,7 +128,8 @@ void spi_init(void)
IO_GIO_DIR1 &= ~GIO_TS_ENABLE; IO_GIO_DIR1 &= ~GIO_TS_ENABLE;
/* Set GIO 12 to output for rtc slave enable */ /* Set GIO 12 to output for rtc slave enable */
IO_GIO_DIR0 &= ~GIO_RTC_ENABLE; IO_GIO_DIR0 &= ~GIO_RTC_ENABLE;
#endif #endif
spi_disable_all_targets(); /* make sure only one is ever enabled at a time */ /* make sure only one is ever enabled at a time */
spi_disable_all_targets();
} }

1
firmware/target/arm/tms320dm320/spi-target.h
View file

@ -38,7 +38,6 @@ enum SPI_target {
void spi_init(void); void spi_init(void);
int spi_block_transfer(enum SPI_target target, int spi_block_transfer(enum SPI_target target,
const bool spi_msb_first,
const uint8_t *tx_bytes, unsigned int tx_size, const uint8_t *tx_bytes, unsigned int tx_size,
uint8_t *rx_bytes, unsigned int rx_size); uint8_t *rx_bytes, unsigned int rx_size);