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Big Patch adds primarily: Samplerate and format selection to recording for SWCODEC. Supprort for samplerates changing in playback (just goes with the recording part inseparably). Samplerates to all encoders. Encoders can be configured individually on a menu specific to the encoder in the recording menu. File creation is delayed until flush time to reduce spinups when splitting. Misc: statusbar icons for numbers are individual digits to display any number. Audio buffer was rearranged to maximize memory available to recording and properly reinitialized when trashed. ColdFire PCM stuff moved to target tree to avoid a complicated mess when adding samplerate switching. Some needed API changes and to neaten up growing gap between hardware and software codecs.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11452 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2006-11-06 18:07:30 +00:00
parent 0b22795e26
commit 0f5cb94aa4
58 changed files with 4769 additions and 2781 deletions

View file

@ -16,260 +16,87 @@
* KIND, either express or implied.
*
****************************************************************************/
#include <stdbool.h>
#include "config.h"
#include "debug.h"
#include "panic.h"
#include <kernel.h>
#include "cpu.h"
#include "i2c.h"
#if defined(HAVE_UDA1380)
#include "uda1380.h"
#elif defined(HAVE_WM8975)
#include "system.h"
#include "kernel.h"
#include "logf.h"
#include "audio.h"
#if defined(HAVE_WM8975)
#include "wm8975.h"
#elif defined(HAVE_WM8758)
#include "wm8758.h"
#elif defined(HAVE_TLV320)
#include "tlv320.h"
#elif defined(HAVE_WM8731) || defined(HAVE_WM8721)
#include "wm8731l.h"
#elif CONFIG_CPU == PNX0101
#include "string.h"
#include "pnx0101.h"
#endif
#include "system.h"
#include "logf.h"
#include <stdio.h>
#include <string.h>
#include <stdarg.h>
#include "pcm_playback.h"
#include "lcd.h"
#include "button.h"
#include "file.h"
#include "buffer.h"
#include "sprintf.h"
#include "button.h"
#include <string.h>
/**
* APIs implemented in the target-specific portion:
* Public -
* pcm_init
* pcm_get_bytes_waiting
* pcm_calculate_peaks
* Semi-private -
* pcm_play_dma_start
* pcm_play_dma_stop
* pcm_play_pause_pause
* pcm_play_pause_unpause
*/
static bool pcm_playing;
static bool pcm_paused;
/** These items may be implemented target specifically or need to
be shared semi-privately **/
/* the registered callback function to ask for more mp3 data */
static void (*callback_for_more)(unsigned char**, size_t*) IDATA_ATTR = NULL;
pcm_more_callback_type pcm_callback_for_more = NULL;
bool pcm_playing = false;
bool pcm_paused = false;
void pcm_play_dma_start(const void *addr, size_t size);
void pcm_play_dma_stop(void);
void pcm_play_pause_pause(void);
void pcm_play_pause_unpause(void);
/** Functions that require targeted implementation **/
#ifndef CPU_COLDFIRE
#if (CONFIG_CPU == S3C2440)
/* TODO: Implement for Gigabeat
For now, just implement some dummy functions.
*/
void pcm_init(void)
{
}
static void dma_start(const void *addr, size_t size)
void pcm_play_dma_start(const void *addr, size_t size)
{
(void)addr;
(void)size;
}
void pcm_play_dma_stop(void)
{
}
void pcm_play_pause_pause(void)
{
}
void pcm_play_pause_unpause(void)
{
}
void pcm_set_frequency(unsigned int frequency)
{
(void)frequency;
}
void pcm_play_stop(void)
{
}
size_t pcm_get_bytes_waiting(void)
{
return 0;
}
#else
#ifdef CPU_COLDFIRE
#ifdef HAVE_SPDIF_OUT
#define EBU_DEFPARM ((7 << 12) | (3 << 8) | (1 << 5) | (5 << 2))
#endif
#define IIS_DEFPARM(freq) ((freq << 12) | 0x300 | 4 << 2)
#define IIS_RESET 0x800
#ifdef IAUDIO_X5
#define SET_IIS_CONFIG(x) IIS1CONFIG = (x);
#else
#define SET_IIS_CONFIG(x) IIS2CONFIG = (x);
#endif
static int pcm_freq = 0x6; /* 44.1 is default */
int peak_left = 0, peak_right = 0;
/* Set up the DMA transfer that kicks in when the audio FIFO gets empty */
static void dma_start(const void *addr, size_t size)
{
pcm_playing = true;
addr = (void *)((unsigned long)addr & ~3); /* Align data */
size &= ~3; /* Size must be multiple of 4 */
/* Reset the audio FIFO */
#ifdef HAVE_SPDIF_OUT
EBU1CONFIG = IIS_RESET | EBU_DEFPARM;
#endif
/* Set up DMA transfer */
SAR0 = (unsigned long)addr; /* Source address */
DAR0 = (unsigned long)&PDOR3; /* Destination address */
BCR0 = size; /* Bytes to transfer */
/* Enable the FIFO and force one write to it */
SET_IIS_CONFIG(IIS_DEFPARM(pcm_freq));
/* Also send the audio to S/PDIF */
#ifdef HAVE_SPDIF_OUT
EBU1CONFIG = EBU_DEFPARM;
#endif
DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_AA | DMA_SINC | (3 << 20) | DMA_START;
}
/* Stops the DMA transfer and interrupt */
static void dma_stop(void)
{
pcm_playing = false;
DCR0 = 0;
DSR0 = 1;
/* Reset the FIFO */
SET_IIS_CONFIG(IIS_RESET | IIS_DEFPARM(pcm_freq));
#ifdef HAVE_SPDIF_OUT
EBU1CONFIG = IIS_RESET | EBU_DEFPARM;
#endif
}
/* sets frequency of input to DAC */
void pcm_set_frequency(unsigned int frequency)
{
switch(frequency)
{
case 11025:
pcm_freq = 0x2;
#ifdef HAVE_UDA1380
uda1380_set_nsorder(3);
#endif
break;
case 22050:
pcm_freq = 0x4;
#ifdef HAVE_UDA1380
uda1380_set_nsorder(3);
#endif
break;
case 44100:
default:
pcm_freq = 0x6;
#ifdef HAVE_UDA1380
uda1380_set_nsorder(5);
#endif
break;
}
}
size_t pcm_get_bytes_waiting(void)
{
return (BCR0 & 0xffffff);
}
/* DMA0 Interrupt is called when the DMA has finished transfering a chunk */
void DMA0(void) __attribute__ ((interrupt_handler, section(".icode")));
void DMA0(void)
{
int res = DSR0;
DSR0 = 1; /* Clear interrupt */
DCR0 &= ~DMA_EEXT;
/* Stop on error */
if(res & 0x70)
{
dma_stop();
logf("DMA Error:0x%04x", res);
}
else
{
size_t next_size;
unsigned char *next_start;
{
void (*get_more)(unsigned char**, size_t*) = callback_for_more;
if (get_more)
get_more(&next_start, &next_size);
else
{
next_size = 0;
next_start = NULL;
}
}
if(next_size)
{
SAR0 = (unsigned long)next_start; /* Source address */
BCR0 = next_size; /* Bytes to transfer */
DCR0 |= DMA_EEXT;
}
else
{
/* Finished playing */
dma_stop();
logf("DMA No Data:0x%04x", res);
}
}
IPR |= (1<<14); /* Clear pending interrupt request */
}
void pcm_init(void)
{
pcm_playing = false;
pcm_paused = false;
MPARK = 0x81; /* PARK[1,0]=10 + BCR24BIT */
DIVR0 = 54; /* DMA0 is mapped into vector 54 in system.c */
DMAROUTE = (DMAROUTE & 0xffffff00) | DMA0_REQ_AUDIO_1;
DMACONFIG = 1; /* DMA0Req = PDOR3 */
/* Reset the audio FIFO */
SET_IIS_CONFIG(IIS_RESET);
/* Enable interrupt at level 7, priority 0 */
ICR6 = 0x1c;
IMR &= ~(1<<14); /* bit 14 is DMA0 */
pcm_set_frequency(44100);
/* Prevent pops (resets DAC to zero point) */
SET_IIS_CONFIG(IIS_DEFPARM(pcm_freq) | IIS_RESET);
#if defined(HAVE_UDA1380)
/* Initialize default register values. */
uda1380_init();
/* Sleep a while so the power can stabilize (especially a long
delay is needed for the line out connector). */
sleep(HZ);
/* Power on FSDAC and HP amp. */
uda1380_enable_output(true);
/* Unmute the master channel (DAC should be at zero point now). */
uda1380_mute(false);
#elif defined(HAVE_TLV320)
tlv320_init();
sleep(HZ/4);
tlv320_mute(false);
#endif
/* Call dma_stop to initialize everything. */
dma_stop();
}
#elif defined(HAVE_WM8975) || defined(HAVE_WM8758) \
|| defined(HAVE_WM8731) || defined(HAVE_WM8721)
@ -286,14 +113,14 @@ void pcm_init(void)
#define FIFO_FREE_COUNT 4 /* TODO: make this sensible */
#endif
static int pcm_freq = 44100; /* 44.1 is default */
static int pcm_freq = HW_SAMPR_DEFAULT; /* 44.1 is default */
/* NOTE: The order of these two variables is important if you use the iPod
assembler optimised fiq handler, so don't change it. */
unsigned short* p IBSS_ATTR;
size_t p_size IBSS_ATTR;
static void dma_start(const void *addr, size_t size)
void pcm_play_dma_start(const void *addr, size_t size)
{
p=(unsigned short*)addr;
p_size=size;
@ -341,7 +168,7 @@ static void dma_start(const void *addr, size_t size)
}
/* Stops the DMA transfer and interrupt */
static void dma_stop(void)
void pcm_play_dma_stop(void)
{
pcm_playing = false;
@ -365,9 +192,58 @@ static void dma_stop(void)
disable_fiq();
}
void pcm_play_pause_pause(void)
{
#if CONFIG_CPU == PP5020
/* Disable the interrupt */
IISCONFIG &= ~0x2;
/* Disable playback FIFO */
IISCONFIG &= ~0x20000000;
#elif CONFIG_CPU == PP5002
/* Disable the interrupt */
IISFIFO_CFG &= ~(1<<9);
/* Disable playback FIFO */
IISCONFIG &= ~0x4;
#endif
disable_fiq();
}
void pcm_play_pause_unpause(void)
{
/* Enable the FIFO and fill it */
enable_fiq();
/* Enable playback FIFO */
#if CONFIG_CPU == PP5020
IISCONFIG |= 0x20000000;
#elif CONFIG_CPU == PP5002
IISCONFIG |= 0x4;
#endif
/* Fill the FIFO - we assume there are enough bytes in the
pcm buffer to fill the 32-byte FIFO. */
while (p_size > 0) {
if (FIFO_FREE_COUNT < 2) {
/* Enable interrupt */
#if CONFIG_CPU == PP5020
IISCONFIG |= 0x2;
#elif CONFIG_CPU == PP5002
IISFIFO_CFG |= (1<<9);
#endif
return;
}
IISFIFO_WR = (*(p++))<<16;
IISFIFO_WR = (*(p++))<<16;
p_size-=4;
}
}
void pcm_set_frequency(unsigned int frequency)
{
pcm_freq=frequency;
(void)frequency;
pcm_freq = HW_SAMPR_DEFAULT;
}
size_t pcm_get_bytes_waiting(void)
@ -378,8 +254,8 @@ size_t pcm_get_bytes_waiting(void)
/* ASM optimised FIQ handler. GCC fails to make use of the fact that FIQ mode
has registers r8-r14 banked, and so does not need to be saved. This routine
uses only these registers, and so will never touch the stack unless it
actually needs to do so when calling callback_for_more. C version is still
included below for reference.
actually needs to do so when calling pcm_callback_for_more. C version is
still included below for reference.
*/
#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002
void fiq(void) ICODE_ATTR __attribute__((naked));
@ -433,10 +309,10 @@ void fiq(void)
"add r1, r11, #4 \n\t" /* r1 = &p_size */
"str r9, [r0] \n\t" /* save internal copies of variables back */
"str r8, [r1] \n\t"
"ldr r2, =callback_for_more\n\t"
"ldr r2, =pcm_callback_for_more\n\t"
"ldr r2, [r2] \n\t" /* get callback address */
"cmp r2, #0 \n\t" /* check for null pointer */
"movne lr, pc \n\t" /* call callback_for_more */
"movne lr, pc \n\t" /* call pcm_callback_for_more */
"bxne r2 \n\t"
"ldmia sp!, { r0-r3, r12, lr}\n\t"
"ldr r8, [r11, #4] \n\t" /* reload p_size and p */
@ -477,7 +353,7 @@ void fiq(void)
"b .exit \n\t"
);
}
#else
#else /* !(CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002) */
void fiq(void) ICODE_ATTR __attribute__ ((interrupt ("FIQ")));
void fiq(void)
{
@ -507,20 +383,21 @@ void fiq(void)
}
/* p is empty, get some more data */
if (callback_for_more) {
callback_for_more((unsigned char**)&p,&p_size);
if (pcm_callback_for_more) {
pcm_callback_for_more((unsigned char**)&p,&p_size);
}
} while (p_size);
/* No more data, so disable the FIFO/FIQ */
dma_stop();
pcm_play_dma_stop();
}
#endif
#endif /* CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002 */
void pcm_init(void)
{
pcm_playing = false;
pcm_paused = false;
pcm_callback_for_more = NULL;
/* Initialize default register values. */
wmcodec_init();
@ -531,8 +408,8 @@ void pcm_init(void)
/* Unmute the master channel (DAC should be at zero point now). */
wmcodec_mute(false);
/* Call dma_stop to initialize everything. */
dma_stop();
/* Call pcm_play_dma_stop to initialize everything. */
pcm_play_dma_stop();
}
#elif (CONFIG_CPU == PNX0101)
@ -542,12 +419,16 @@ void pcm_init(void)
short __attribute__((section(".dmabuf"))) dma_buf_left[DMA_BUF_SAMPLES];
short __attribute__((section(".dmabuf"))) dma_buf_right[DMA_BUF_SAMPLES];
static int pcm_freq = 44100; /* 44.1 is default */
static int pcm_freq = HW_SAMPR_DEFAULT; /* 44.1 is default */
unsigned short* p IBSS_ATTR;
size_t p_size IBSS_ATTR;
static void dma_start(const void *addr, size_t size)
void pcm_init(void)
{
}
void pcm_play_dma_start(const void *addr, size_t size)
{
p = (unsigned short*)addr;
p_size = size;
@ -555,11 +436,19 @@ static void dma_start(const void *addr, size_t size)
pcm_playing = true;
}
static void dma_stop(void)
void pcm_play_dma_stop(void)
{
pcm_playing = false;
}
void pcm_play_pause_pause(void)
{
}
void pcm_play_pause_unpause(void)
{
}
static inline void fill_dma_buf(int offset)
{
short *l, *r, *lend;
@ -611,8 +500,8 @@ static inline void fill_dma_buf(int offset)
p = tmp_p;
if (l >= lend)
return;
else if (callback_for_more)
callback_for_more((unsigned char**)&p,
else if (pcm_callback_for_more)
pcm_callback_for_more((unsigned char**)&p,
&p_size);
}
while (p_size);
@ -647,9 +536,10 @@ unsigned long physical_address(void *p)
void pcm_init(void)
{
int i;
callback_for_more = NULL;
pcm_playing = false;
pcm_paused = false;
pcm_callback_for_more = NULL;
memset(dma_buf_left, 0, sizeof(dma_buf_left));
memset(dma_buf_right, 0, sizeof(dma_buf_right));
@ -691,271 +581,37 @@ void pcm_init(void)
void pcm_set_frequency(unsigned int frequency)
{
pcm_freq=frequency;
(void)frequency;
pcm_freq = HW_SAMPR_DEFAULT;
}
size_t pcm_get_bytes_waiting(void)
{
return p_size;
}
#endif
#endif /* CONFIG_CPU == */
void pcm_play_stop(void)
/* dummy functions for those not actually supporting all this yet */
void pcm_apply_settings(bool reset)
{
if (pcm_playing) {
dma_stop();
}
(void)reset;
}
#endif
void pcm_play_data(void (*get_more)(unsigned char** start, size_t* size),
unsigned char* start, size_t size)
void pcm_set_monitor(int monitor)
{
callback_for_more = get_more;
if (!(start && size))
{
if (get_more)
get_more(&start, &size);
else
return;
}
if (start && size)
{
dma_start(start, size);
if (pcm_paused) {
pcm_paused = false;
pcm_play_pause(false);
}
}
(void)monitor;
}
/** **/
void pcm_mute(bool mute)
{
#ifdef HAVE_UDA1380
uda1380_mute(mute);
#elif defined(HAVE_WM8975) || defined(HAVE_WM8758) \
#if defined(HAVE_WM8975) || defined(HAVE_WM8758) \
|| defined(HAVE_WM8731) || defined(HAVE_WM8721)
wmcodec_mute(mute);
#elif defined(HAVE_TLV320)
tlv320_mute(mute);
#endif
if (mute)
sleep(HZ/16);
}
void pcm_play_pause(bool play)
{
bool needs_change = pcm_paused == play;
/* This needs to be done ahead of the rest to prevent infinite
* recursion from dma_start */
pcm_paused = !play;
if (pcm_playing && needs_change) {
if(play) {
if (pcm_get_bytes_waiting()) {
logf("unpause");
#ifdef CPU_COLDFIRE
/* Enable the FIFO and force one write to it */
SET_IIS_CONFIG(IIS_DEFPARM(pcm_freq));
#ifdef HAVE_SPDIF_OUT
EBU1CONFIG = EBU_DEFPARM;
#endif
DCR0 |= DMA_EEXT | DMA_START;
#elif defined(HAVE_WM8975) || defined(HAVE_WM8758) \
|| defined(HAVE_WM8731) || defined(HAVE_WM8721)
/* Enable the FIFO and fill it */
enable_fiq();
/* Enable playback FIFO */
#if CONFIG_CPU == PP5020
IISCONFIG |= 0x20000000;
#elif CONFIG_CPU == PP5002
IISCONFIG |= 0x4;
#endif
/* Fill the FIFO - we assume there are enough bytes in the
pcm buffer to fill the 32-byte FIFO. */
while (p_size > 0) {
if (FIFO_FREE_COUNT < 2) {
/* Enable interrupt */
#if CONFIG_CPU == PP5020
IISCONFIG |= 0x2;
#elif CONFIG_CPU == PP5002
IISFIFO_CFG |= (1<<9);
#endif
return;
}
IISFIFO_WR = (*(p++))<<16;
IISFIFO_WR = (*(p++))<<16;
p_size-=4;
}
#elif (CONFIG_CPU == PNX0101 || CONFIG_CPU == S3C2440) /* End wmcodecs */
/* nothing yet */
#endif
} else {
#if (CONFIG_CPU != PNX0101 && CONFIG_CPU != S3C2440)
size_t next_size;
unsigned char *next_start;
void (*get_more)(unsigned char**, size_t*) = callback_for_more;
logf("unpause, no data waiting");
if (get_more)
get_more(&next_start, &next_size);
if (next_start && next_size)
dma_start(next_start, next_size);
else
{
dma_stop();
logf("unpause attempted, no data");
}
#endif
}
} else {
logf("pause");
#ifdef CPU_COLDFIRE
/* Disable DMA peripheral request. */
DCR0 &= ~DMA_EEXT;
SET_IIS_CONFIG(IIS_RESET | IIS_DEFPARM(pcm_freq));
#ifdef HAVE_SPDIF_OUT
EBU1CONFIG = IIS_RESET | EBU_DEFPARM;
#endif
#elif defined(HAVE_WM8975) || defined(HAVE_WM8758) \
|| defined(HAVE_WM8731) || defined(HAVE_WM8721)
#if CONFIG_CPU == PP5020
/* Disable the interrupt */
IISCONFIG &= ~0x2;
/* Disable playback FIFO */
IISCONFIG &= ~0x20000000;
#elif CONFIG_CPU == PP5002
/* Disable the interrupt */
IISFIFO_CFG &= ~(1<<9);
/* Disable playback FIFO */
IISCONFIG &= ~0x4;
#endif
disable_fiq();
#elif (CONFIG_CPU == PNX0101 || CONFIG_CPU == S3C2440) /* End wmcodecs */
/* nothing yet */
#endif
}
} /* pcm_playing && needs_change */
}
bool pcm_is_playing(void) {
return pcm_playing;
}
bool pcm_is_paused(void) {
return pcm_paused;
}
#if defined(CPU_COLDFIRE)
/* Peaks ahead in the DMA buffer based upon the calling period to
attempt to compensate for the delay. Keeps a moving average of
length four. */
void pcm_calculate_peaks(int *left, int *right)
{
unsigned long samples;
unsigned long *addr, *end;
long peak_p, peak_n;
static unsigned long last_peak_tick = 0;
static unsigned long frame_period = 0;
/* Throttled peak ahead based on calling period */
unsigned long period = current_tick - last_peak_tick;
/* Keep reasonable limits on period */
if (period < 1)
period = 1;
else if (period > HZ/5)
period = HZ/5;
frame_period = (3*frame_period + period) >> 2;
last_peak_tick = current_tick;
if (!pcm_playing || pcm_paused)
{
peak_left = peak_right = 0;
goto peak_done;
}
samples = (BCR0 & 0xffffff) >> 2;
addr = (long *)(SAR0 & ~3);
samples = MIN(frame_period*44100/HZ, samples);
end = addr + samples;
peak_p = peak_n = 0;
if (left && right)
{
if (samples > 0)
{
long peak_rp = 0, peak_rn = 0;
do
{
long value = *addr;
long ch;
ch = value >> 16;
if (ch > peak_p) peak_p = ch;
else if (ch < peak_n) peak_n = ch;
ch = (short)value;
if (ch > peak_rp) peak_rp = ch;
else if (ch < peak_rn) peak_rn = ch;
addr += 4;
}
while (addr < end);
peak_left = MAX(peak_p, -peak_n);
peak_right = MAX(peak_rp, -peak_rn);
}
}
else if (left || right)
{
if (samples > 0)
{
if (left)
{
/* Put left channel in low word */
addr = (long *)((short *)addr - 1);
end = (long *)((short *)end - 1);
}
do
{
long value = *(short *)addr;
if (value > peak_p) peak_p = value;
else if (value < peak_n) peak_n = value;
addr += 4;
}
while (addr < end);
if (left)
peak_left = MAX(peak_p, -peak_n);
else
peak_right = MAX(peak_p, -peak_n);
}
}
peak_done:
if (left)
*left = peak_left;
if (right)
*right = peak_right;
}
#else
/*
* This function goes directly into the DMA buffer to calculate the left and
* right peak values. To avoid missing peaks it tries to look forward two full
@ -1037,4 +693,94 @@ void pcm_calculate_peaks(int *left, int *right)
}
#endif
}
#endif /* CPU_COLDFIRE */
/****************************************************************************
* Functions that do not require targeted implementation but only a targeted
* interface
*/
/* Common code to pcm_play_data and pcm_play_pause
Returns true if DMA playback was started, else false. */
bool pcm_play_data_start(pcm_more_callback_type get_more,
unsigned char *start, size_t size)
{
if (!(start && size))
{
size = 0;
if (get_more)
get_more(&start, &size);
}
if (start && size)
{
pcm_play_dma_start(start, size);
return true;
}
return false;
}
void pcm_play_data(pcm_more_callback_type get_more,
unsigned char *start, size_t size)
{
pcm_callback_for_more = get_more;
if (pcm_play_data_start(get_more, start, size) && pcm_paused)
{
pcm_paused = false;
pcm_play_pause(false);
}
}
void pcm_play_pause(bool play)
{
bool needs_change = pcm_paused == play;
/* This needs to be done ahead of the rest to prevent infinite
recursion from pcm_play_data */
pcm_paused = !play;
if (pcm_playing && needs_change)
{
if (play)
{
if (pcm_get_bytes_waiting())
{
logf("unpause");
pcm_play_pause_unpause();
}
else
{
logf("unpause, no data waiting");
if (!pcm_play_data_start(pcm_callback_for_more, NULL, 0))
{
pcm_play_dma_stop();
logf("unpause attempted, no data");
}
}
}
else
{
logf("pause");
pcm_play_pause_pause();
}
} /* pcm_playing && needs_change */
}
void pcm_play_stop(void)
{
if (pcm_playing)
pcm_play_dma_stop();
}
bool pcm_is_playing(void)
{
return pcm_playing;
}
bool pcm_is_paused(void)
{
return pcm_paused;
}