forked from len0rd/rockbox
Of course don't forget the init code..
+ add interrupt priority handling git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17389 a1c6a512-1295-4272-9138-f99709370657
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3ae70b3195
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0f1a0405e0
1 changed files with 30 additions and 7 deletions
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@ -24,6 +24,9 @@
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#include "uart-target.h"
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#include "uart-target.h"
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#include "system-arm.h"
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#include "system-arm.h"
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#include "spi.h"
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#include "spi.h"
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#ifdef CREATIVE_ZVM
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#include "dma-target.h"
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#endif
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#define default_interrupt(name) \
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#define default_interrupt(name) \
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extern __attribute__((weak,alias("UIRQ"))) void name (void)
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extern __attribute__((weak,alias("UIRQ"))) void name (void)
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@ -78,6 +81,23 @@ default_interrupt(ARMCOM_RX);
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default_interrupt(ARMCOM_TX);
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default_interrupt(ARMCOM_TX);
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default_interrupt(RESERVED);
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default_interrupt(RESERVED);
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/* The entry address is equal to base address plus an offset.
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* The offset is based on the priority of the interrupt. So if
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* the priority of an interrupt is changed, the user should also
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* change the offset for the interrupt in the entry table.
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*/
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static const unsigned short const irqpriority[] =
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{
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IRQ_TIMER0,IRQ_TIMER1,IRQ_TIMER2,IRQ_TIMER3,IRQ_CCD_VD0,IRQ_CCD_VD1,
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IRQ_CCD_WEN,IRQ_VENC,IRQ_SERIAL0,IRQ_SERIAL1,IRQ_EXT_HOST,IRQ_DSPHINT,
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IRQ_UART0,IRQ_UART1,IRQ_USB_DMA,IRQ_USB_CORE,IRQ_VLYNQ,IRQ_MTC0,IRQ_MTC1,
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IRQ_SD_MMC,IRQ_SDIO_MS,IRQ_GIO0,IRQ_GIO1,IRQ_GIO2,IRQ_GIO3,IRQ_GIO4,IRQ_GIO5,
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IRQ_GIO6,IRQ_GIO7,IRQ_GIO8,IRQ_GIO9,IRQ_GIO10,IRQ_GIO11,IRQ_GIO12,IRQ_GIO13,
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IRQ_GIO14,IRQ_GIO15,IRQ_PREVIEW0,IRQ_PREVIEW1,IRQ_WATCHDOG,IRQ_I2C,IRQ_CLKC,
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IRQ_ICE,IRQ_ARMCOM_RX,IRQ_ARMCOM_TX,IRQ_RESERVED
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}; /* IRQ priorities, ranging from highest to lowest */
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static void (* const irqvector[])(void) =
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static void (* const irqvector[])(void) =
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{
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{
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TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1,
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TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1,
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@ -157,8 +177,7 @@ void system_reboot(void)
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"bic ip, ip, #0x2100 @ ..v....s........ \n"
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"bic ip, ip, #0x2100 @ ..v....s........ \n"
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"mcr p15, 0, ip, c1, c0, 0 @ ctrl register \n"
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"mcr p15, 0, ip, c1, c0, 0 @ ctrl register \n"
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"mov ip, #0xFF000000 \n"
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"mov ip, #0xFF000000 \n"
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"orr ip, ip, #0xFF0000 @ ip = 0xFFFF0000 \n"
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"orr pc, ip, #0xFF0000 @ ip = 0xFFFF0000 \n"
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"mov pc, ip \n"
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:
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:
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:
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:
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: "cc"
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: "cc"
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@ -194,10 +213,10 @@ void system_init(void)
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IO_INTC_ENTRY_TBA0 = 0;
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IO_INTC_ENTRY_TBA0 = 0;
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IO_INTC_ENTRY_TBA1 = 0;
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IO_INTC_ENTRY_TBA1 = 0;
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unsigned short i;
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int i;
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/* Reset interrupt priorities to default values */
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/* Set interrupt priorities to predefined values */
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for(i = 0; i < 23; i++)
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for(i = 0; i < 23; i++)
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DM320_REG(0x0540+i*2) = ( (i*2+1) << 8 ) | i*2 ;/* IO_INTC_PRIORITYx */
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DM320_REG(0x0540+i*2) = ((irqpriority[i*2+1] & 0x3F) << 8) | (irqpriority[i*2] & 0x3F); /* IO_INTC_PRIORITYx */
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/* Turn off all timers */
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/* Turn off all timers */
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IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP;
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IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP;
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@ -214,6 +233,10 @@ void system_init(void)
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uart_init();
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uart_init();
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spi_init();
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spi_init();
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#ifdef CREATIVE_ZVM
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dma_init();
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#endif
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/* MMU initialization (Starts data and instruction cache) */
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/* MMU initialization (Starts data and instruction cache) */
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ttb_init();
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ttb_init();
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/* Make sure everything is mapped on itself */
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/* Make sure everything is mapped on itself */
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