forked from len0rd/rockbox
Move load_firmware() to separate file
The idea is to share loading code between bootloaders and rolo(). Change-Id: I1656ed91946d7a05cb7c9fa7a16793c3c862a5cd Reviewed-on: http://gerrit.rockbox.org/190 Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
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29 changed files with 727 additions and 608 deletions
138
firmware/rolo.c
138
firmware/rolo.c
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@ -37,16 +37,17 @@
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#include "storage.h"
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#include "rolo.h"
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#ifdef MI4_FORMAT
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#include "loader_strerror.h"
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#if defined(MI4_FORMAT)
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#include "crc32-mi4.h"
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#undef FIRMWARE_OFFSET_FILE_CRC
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#undef FIRMWARE_OFFSET_FILE_DATA
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#define FIRMWARE_OFFSET_FILE_CRC 0xC
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#define FIRMWARE_OFFSET_FILE_DATA 0x200
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#endif
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#ifdef RKW_FORMAT
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#include "mi4-loader.h"
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#define LOAD_FIRMWARE(a,b,c) load_mi4(a,b,c)
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#elif defined(RKW_FORMAT)
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#include "rkw-loader.h"
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#define LOAD_FIRMWARE(a,b,c) load_rkw(a,b,c)
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#else
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#include "rb-loader.h"
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#define LOAD_FIRMWARE(a,b,c) load_firmware(a,b,c)
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#endif
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#if !defined(IRIVER_IFP7XX_SERIES)
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@ -206,7 +207,7 @@ extern unsigned long loadaddress;
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* Filename must be a fully defined filename including the path and extension
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*
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***************************************************************************/
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#ifdef RKW_FORMAT
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#if defined(CPU_COLDFIRE) || defined(CPU_ARM) || defined(CPU_MIPS)
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int rolo_load(const char* filename)
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{
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unsigned char* ramstart = (void*)&loadaddress;
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@ -232,15 +233,26 @@ int rolo_load(const char* filename)
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rolo_handle = core_alloc_maximum("rolo", &filebuf_size, NULL);
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filebuf = core_get_data(rolo_handle);
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errno = load_rkw(filebuf, filename, filebuf_size);
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if (errno < 0)
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errno = LOAD_FIRMWARE(filebuf, filename, filebuf_size);
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if (errno <= 0)
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{
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rolo_error(rkw_strerror(errno));
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rolo_error(loader_strerror(errno));
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return -1;
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}
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else
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length = errno;
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#if defined(CPU_PP) && NUM_CORES > 1
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lcd_puts(0, 2, "Waiting for coprocessor...");
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lcd_update();
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rolo_restart_cop();
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/* Wait for COP to be in safe code */
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while(cpu_reply != 1);
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lcd_puts(0, 2, " ");
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lcd_update();
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#endif
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#ifdef HAVE_STORAGE_FLUSH
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lcd_puts(0, 1, "Flushing storage buffers");
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lcd_update();
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@ -255,27 +267,29 @@ int rolo_load(const char* filename)
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#endif
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adc_close();
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#if CONFIG_CPU != IMX31L /* We're not finished yet */
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#ifdef CPU_ARM
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/* Should do these together since some ARM version should never have
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* FIQ disabled and not IRQ (imx31 errata). */
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disable_interrupt(IRQ_FIQ_STATUS);
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#else
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/* Some targets have a higher disable level than HIGEST_IRQ_LEVEL */
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set_irq_level(DISABLE_INTERRUPTS);
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#endif
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#endif /* CONFIG_CPU == IMX31L */
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rolo_restart(filebuf, ramstart, length);
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/* never reached */
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return 0;
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}
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#else
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#else /* defined(CPU_SH) */
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int rolo_load(const char* filename)
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{
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int fd;
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long length;
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#if defined(CPU_COLDFIRE) || defined(CPU_ARM) || defined(CPU_MIPS)
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#if !defined(MI4_FORMAT)
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int i;
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#endif
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unsigned long checksum,file_checksum;
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#else
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long file_length;
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unsigned short checksum,file_checksum;
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#endif
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unsigned char* ramstart = (void*)&loadaddress;
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unsigned char* filebuf;
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size_t filebuf_size;
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@ -306,87 +320,6 @@ int rolo_load(const char* filename)
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rolo_handle = core_alloc_maximum("rolo", &filebuf_size, NULL);
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filebuf = core_get_data(rolo_handle);
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#if CONFIG_CPU != SH7034
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/* Read and save checksum */
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lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
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if (read(fd, &file_checksum, 4) != 4) {
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rolo_error("Error Reading checksum");
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return -1;
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}
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#if !defined(MI4_FORMAT)
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/* Rockbox checksums are big-endian */
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file_checksum = betoh32(file_checksum);
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#endif
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#if defined(CPU_PP) && NUM_CORES > 1
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lcd_puts(0, 2, "Waiting for coprocessor...");
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lcd_update();
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rolo_restart_cop();
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/* Wait for COP to be in safe code */
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while(cpu_reply != 1);
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lcd_puts(0, 2, " ");
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lcd_update();
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#endif
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lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
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/* this shouldn't happen, but well */
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if ((long)filebuf_size < length)
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{
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rolo_error("File too big");
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return -1;
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}
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if (read(fd, filebuf, length) != length) {
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rolo_error("Error Reading File");
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return -1;
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}
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#ifdef MI4_FORMAT
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/* Check CRC32 to see if we have a valid file */
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chksum_crc32gentab();
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checksum = chksum_crc32 (filebuf, length);
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#else
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checksum = MODEL_NUMBER;
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for(i = 0;i < length;i++) {
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checksum += filebuf[i];
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}
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#endif
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/* Verify checksum against file header */
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if (checksum != file_checksum) {
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rolo_error("Checksum Error");
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return -1;
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}
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#ifdef HAVE_STORAGE_FLUSH
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lcd_puts(0, 1, "Flushing storage buffers");
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lcd_update();
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storage_flush();
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#endif
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lcd_puts(0, 1, "Executing");
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lcd_update();
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#ifdef HAVE_REMOTE_LCD
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lcd_remote_puts(0, 1, "Executing");
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lcd_remote_update();
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#endif
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adc_close();
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#if CONFIG_CPU != IMX31L /* We're not finished yet */
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#ifdef CPU_ARM
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/* Should do these together since some ARM version should never have
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* FIQ disabled and not IRQ (imx31 errata). */
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disable_interrupt(IRQ_FIQ_STATUS);
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#else
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/* Some targets have a higher disable level than HIGEST_IRQ_LEVEL */
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set_irq_level(DISABLE_INTERRUPTS);
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#endif
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#endif /* CONFIG_CPU == IMX31L */
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#else /* CONFIG_CPU == SH7034 */
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/* Read file length from header and compare to real file length */
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lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
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if(read(fd, &file_length, 4) != 4) {
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@ -450,14 +383,13 @@ int rolo_load(const char* filename)
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#if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
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defined(ARCHOS_FMRECORDER)
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PAIOR = 0x0FA0;
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#endif
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#endif
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rolo_restart(filebuf, ramstart, length);
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return 0; /* this is never reached */
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(void)checksum; (void)file_checksum;
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}
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#endif /* ifdef RKW_FORMAT */
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#endif /* */
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#else /* !defined(IRIVER_IFP7XX_SERIES) */
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int rolo_load(const char* filename)
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{
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