forked from len0rd/rockbox
S5L870x crt0.S: Streamline things a bit, and close unneeded clock gates on iPod Nano 2G
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23098 a1c6a512-1295-4272-9138-f99709370657
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747b9ca258
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0260b0ad5a
1 changed files with 26 additions and 31 deletions
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@ -61,17 +61,13 @@ newstart2:
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str r0, [r1]
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mov r0, #0
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ldr r1, =0x39c00008
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str r0, [r1] // mask all interrupts
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ldr r1, =0x39c00020
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str r0, [r1] // mask all external interrupts
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mvn r0, #0
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ldr r1, =0x39c0001c
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str r0, [r1] // clear pending external interrupts
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mov r1, #0x39c00000
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str r0, [r1,#0x08] // mask all interrupts
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str r0, [r1,#0x20] // mask all external interrupts
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mvn r0, #0
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str r0, [r1,#0x1c] // clear pending external interrupts
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str r0, [r1] // irq priority
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ldr r1, =0x39c00010
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str r0, [r1] // clear pending interrupts
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str r0, [r1,#0x10] // clear pending interrupts
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// ldr r1, =0x3cf00000
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// ldr r0, [r1]
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@ -80,11 +76,10 @@ newstart2:
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// mov r2, #0x10
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// orr r0, r0, r2
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// str r0, [r1]
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// ldr r1, =0x3cf00004
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// ldr r0, [r1]
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// ldr r0, [r1,#0x04]
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// mov r2, #4
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// orr r0, r0, r2
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// str r0, [r1] // switch backlight on
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// str r0, [r1,#0x04] // switch backlight on
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#if CONFIG_CPU==S5L8701
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ldr r1, =0x38200000
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@ -109,36 +104,29 @@ start_loc:
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#endif /* BOOTLOADER */
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#endif /* CONFIG_CPU==S5L8701 */
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ldr r1, =0x3c500000 // CLKCON
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ldr r1, =0x3c500000
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ldr r0, =0x00800080
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str r0, [r1]
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ldr r1, =0x3c500024 // PLLCON
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str r0, [r1] // CLKCON
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mov r0, #0
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str r0, [r1]
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ldr r1, =0x3c500004 // PLL0PMS
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str r0, [r1,#0x24] // PLLCON
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#ifdef IPOD_NANO2G
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ldr r0, =0x21200 // pdiv=2, mdiv=?? sdiv=0
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ldr r0, =0x21200 // pdiv=2, mdiv=0x12 sdiv=0
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#else
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ldr r0, =0x1ad200
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ldr r0, =0x1ad200 // pdiv=0x1a, mdiv=0xd2 sdiv=0
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#endif
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str r0, [r1]
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ldr r1, =0x3c500014 // PLL0LCNT
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str r0, [r1,#0x04] // PLL0PMS
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ldr r0, =8100
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str r0, [r1]
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ldr r1, =0x3c500024 // PLLCON
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str r0, [r1,#0x14] // PLL0LCNT
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mov r0, #1
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str r0, [r1]
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ldr r1, =0x3c500020 // PLLLOCK
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str r0, [r1,#0x24] // PLLCON
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1:
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ldr r0, [r1]
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ldr r0, [r1,#0x20] // PLLLOCK
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tst r0, #1
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beq 1b
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ldr r1, =0x3c50003c // CLKCON2
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mov r0, #0x80
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str r0, [r1]
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ldr r1, =0x3c500000 // CLKCON
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ldr r0, =0x20803180
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str r0, [r1] // FCLK_CPU = 200MHz, HCLK = 100MHz, PCLK = 50MHz, other clocks off
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str r0, [r1,#0x3c] // CLKCON2
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ldr r0, =0x20803180 // FCLK_CPU = 200MHz, HCLK = 100MHz, PCLK = 50MHz, other clocks off
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str r0, [r1] // CLKCON
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ldr r2, =0xc0000078
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mrc 15, 0, r0, c1, c0, 0
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@ -168,6 +156,13 @@ start_loc:
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/* The following two sections of code (i.e. Nano2G and Meizus) should
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be unified at some point. */
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#ifdef IPOD_NANO2G
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ldr r1, =0x3c500000
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ldr r0, =0xffdff7ff
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str r0, [r1,#0x28] // PWRCON
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ldr r0, =0xffffef7e
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str r0, [r1,#0x40] // PWRCONEXT
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mrc 15, 0, r0, c1, c0, 0
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bic r0, r0, #0x1000
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bic r0, r0, #0x5
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