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Sansa Connect: Clear recoverzap parameter

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Clearing recoverzap parameter exists the Recovery Mode. This makes it
possible to run Rockbox on Sansa Connect without relying on original
Linux firmware.

Enable write-through cache on flash memory as write-back complicates
handling without any real benefits. The flash memory accepts commands
as series of writes at predefined addresses, so it is important that
the cache does not interfere with the writes.

Change-Id: I219f962f20953d84df43012cf16bbb16d673add8
This commit is contained in:
Tomasz Moń 2021-05-20 21:16:46 +02:00
parent 5388607968
commit 00b4626790
3 changed files with 149 additions and 9 deletions
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12
firmware/target/arm/tms320dm320/boot.lds
View file

@ -38,12 +38,12 @@ STARTUP(target/arm/tms320dm320/crt0.o)
#ifdef SANSA_CONNECT
/* Offset in flash from beginning, we don't want overwrite OF bootloader
due to recovery mode and more importantly - hardware block protection.
This offset makes Rockbox bootloader a replacement for OF vmlinux.
In .srr file header add any valid memory address from following
<0x1000000; 0x1300180) u (0x131EAF4; 0x1420000) u (0x1440000; 0x5000000>
ensuring that complete bootloader fits in.
Entry point in .srr file should be equal to _loadaddress. */
* due to recovery mode and more importantly - hardware block protection.
* Rockbox bootloader is flashed into kernel partition and chainloaded
* from OF bootloader via Arbitrary Code Execution exploit. The first
* instruction must be position independent as Rockbox bootloader will be
* copied to RAM at 0x01000000 and executed from RAM.
*/
#define FLASHSIZE 0x00400000
#define FLASHMEMORIG 0x00120010
/* Kernel partition is 2 M, srr header is 16 bytes, sig is 2048 bytes */

6
firmware/target/arm/tms320dm320/crt0.S
View file

@ -201,14 +201,14 @@ _start:
mov r3, #CACHE_NONE
bl map_section
/* Enable caching for FLASH */
/* Enable write-through caching for FLASH */
ldr r0, =_flash_start
ldr r1, =_flash_start
ldr r2, =_flash_sizem
mov r3, #CACHE_ALL
mov r3, #(CACHE_ALL & ~BUFFERED)
bl map_section
/* Enable caching for RAM */
/* Enable write-back caching for RAM */
ldr r0, =_sdram_start
ldr r1, =_sdram_start
ldr r2, =_sdram_sizem